diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 7 |
3 files changed, 3 insertions, 18 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 2a871b5a..b94eade1 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -327,7 +327,6 @@ int gr_gk20a_wait_idle(struct gk20a *g, unsigned long duration_ms, | |||
327 | u32 expect_delay) | 327 | u32 expect_delay) |
328 | { | 328 | { |
329 | u32 delay = expect_delay; | 329 | u32 delay = expect_delay; |
330 | bool gr_enabled; | ||
331 | bool ctxsw_active; | 330 | bool ctxsw_active; |
332 | bool gr_busy; | 331 | bool gr_busy; |
333 | u32 gr_engine_id; | 332 | u32 gr_engine_id; |
@@ -346,9 +345,6 @@ int gr_gk20a_wait_idle(struct gk20a *g, unsigned long duration_ms, | |||
346 | only when gr_status is read */ | 345 | only when gr_status is read */ |
347 | (void) gk20a_readl(g, gr_status_r()); | 346 | (void) gk20a_readl(g, gr_status_r()); |
348 | 347 | ||
349 | gr_enabled = gk20a_readl(g, mc_enable_r()) & | ||
350 | mc_enable_pgraph_enabled_f(); | ||
351 | |||
352 | engine_status = gk20a_readl(g, | 348 | engine_status = gk20a_readl(g, |
353 | fifo_engine_status_r(gr_engine_id)); | 349 | fifo_engine_status_r(gr_engine_id)); |
354 | 350 | ||
@@ -362,8 +358,7 @@ int gr_gk20a_wait_idle(struct gk20a *g, unsigned long duration_ms, | |||
362 | gr_busy = gk20a_readl(g, gr_engine_status_r()) & | 358 | gr_busy = gk20a_readl(g, gr_engine_status_r()) & |
363 | gr_engine_status_value_busy_f(); | 359 | gr_engine_status_value_busy_f(); |
364 | 360 | ||
365 | if (!gr_enabled || ctx_status_invalid | 361 | if (ctx_status_invalid || (!gr_busy && !ctxsw_active)) { |
366 | || (!gr_busy && !ctxsw_active)) { | ||
367 | nvgpu_log_fn(g, "done"); | 362 | nvgpu_log_fn(g, "done"); |
368 | return 0; | 363 | return 0; |
369 | } | 364 | } |
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 2fb700f0..db6f5618 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -45,7 +45,6 @@ | |||
45 | #include <nvgpu/hw/gp10b/hw_gr_gp10b.h> | 45 | #include <nvgpu/hw/gp10b/hw_gr_gp10b.h> |
46 | #include <nvgpu/hw/gp10b/hw_fifo_gp10b.h> | 46 | #include <nvgpu/hw/gp10b/hw_fifo_gp10b.h> |
47 | #include <nvgpu/hw/gp10b/hw_ctxsw_prog_gp10b.h> | 47 | #include <nvgpu/hw/gp10b/hw_ctxsw_prog_gp10b.h> |
48 | #include <nvgpu/hw/gp10b/hw_mc_gp10b.h> | ||
49 | 48 | ||
50 | #define GFXP_WFI_TIMEOUT_COUNT_DEFAULT 100000 | 49 | #define GFXP_WFI_TIMEOUT_COUNT_DEFAULT 100000 |
51 | 50 | ||
@@ -1452,7 +1451,6 @@ int gr_gp10b_wait_empty(struct gk20a *g, unsigned long duration_ms, | |||
1452 | u32 expect_delay) | 1451 | u32 expect_delay) |
1453 | { | 1452 | { |
1454 | u32 delay = expect_delay; | 1453 | u32 delay = expect_delay; |
1455 | bool gr_enabled; | ||
1456 | bool ctxsw_active; | 1454 | bool ctxsw_active; |
1457 | bool gr_busy; | 1455 | bool gr_busy; |
1458 | u32 gr_status; | 1456 | u32 gr_status; |
@@ -1468,9 +1466,6 @@ int gr_gp10b_wait_empty(struct gk20a *g, unsigned long duration_ms, | |||
1468 | only when gr_status is read */ | 1466 | only when gr_status is read */ |
1469 | gr_status = gk20a_readl(g, gr_status_r()); | 1467 | gr_status = gk20a_readl(g, gr_status_r()); |
1470 | 1468 | ||
1471 | gr_enabled = gk20a_readl(g, mc_enable_r()) & | ||
1472 | mc_enable_pgraph_enabled_f(); | ||
1473 | |||
1474 | ctxsw_active = gr_status & 1<<7; | 1469 | ctxsw_active = gr_status & 1<<7; |
1475 | 1470 | ||
1476 | activity0 = gk20a_readl(g, gr_activity_0_r()); | 1471 | activity0 = gk20a_readl(g, gr_activity_0_r()); |
@@ -1483,7 +1478,7 @@ int gr_gp10b_wait_empty(struct gk20a *g, unsigned long duration_ms, | |||
1483 | activity2 == 0 && | 1478 | activity2 == 0 && |
1484 | gr_activity_empty_or_preempted(activity4)); | 1479 | gr_activity_empty_or_preempted(activity4)); |
1485 | 1480 | ||
1486 | if (!gr_enabled || (!gr_busy && !ctxsw_active)) { | 1481 | if (!gr_busy && !ctxsw_active) { |
1487 | nvgpu_log_fn(g, "done"); | 1482 | nvgpu_log_fn(g, "done"); |
1488 | return 0; | 1483 | return 0; |
1489 | } | 1484 | } |
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 4f7468b3..2596d400 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -57,7 +57,6 @@ | |||
57 | #include <nvgpu/hw/gv11b/hw_fifo_gv11b.h> | 57 | #include <nvgpu/hw/gv11b/hw_fifo_gv11b.h> |
58 | #include <nvgpu/hw/gv11b/hw_proj_gv11b.h> | 58 | #include <nvgpu/hw/gv11b/hw_proj_gv11b.h> |
59 | #include <nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h> | 59 | #include <nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h> |
60 | #include <nvgpu/hw/gv11b/hw_mc_gv11b.h> | ||
61 | #include <nvgpu/hw/gv11b/hw_ram_gv11b.h> | 60 | #include <nvgpu/hw/gv11b/hw_ram_gv11b.h> |
62 | #include <nvgpu/hw/gv11b/hw_pbdma_gv11b.h> | 61 | #include <nvgpu/hw/gv11b/hw_pbdma_gv11b.h> |
63 | #include <nvgpu/hw/gv11b/hw_perf_gv11b.h> | 62 | #include <nvgpu/hw/gv11b/hw_perf_gv11b.h> |
@@ -2050,7 +2049,6 @@ int gr_gv11b_wait_empty(struct gk20a *g, unsigned long duration_ms, | |||
2050 | u32 expect_delay) | 2049 | u32 expect_delay) |
2051 | { | 2050 | { |
2052 | u32 delay = expect_delay; | 2051 | u32 delay = expect_delay; |
2053 | bool gr_enabled; | ||
2054 | bool ctxsw_active; | 2052 | bool ctxsw_active; |
2055 | bool gr_busy; | 2053 | bool gr_busy; |
2056 | u32 gr_status; | 2054 | u32 gr_status; |
@@ -2066,9 +2064,6 @@ int gr_gv11b_wait_empty(struct gk20a *g, unsigned long duration_ms, | |||
2066 | only when gr_status is read */ | 2064 | only when gr_status is read */ |
2067 | gr_status = gk20a_readl(g, gr_status_r()); | 2065 | gr_status = gk20a_readl(g, gr_status_r()); |
2068 | 2066 | ||
2069 | gr_enabled = gk20a_readl(g, mc_enable_r()) & | ||
2070 | mc_enable_pgraph_enabled_f(); | ||
2071 | |||
2072 | ctxsw_active = gr_status & 1<<7; | 2067 | ctxsw_active = gr_status & 1<<7; |
2073 | 2068 | ||
2074 | activity0 = gk20a_readl(g, gr_activity_0_r()); | 2069 | activity0 = gk20a_readl(g, gr_activity_0_r()); |
@@ -2081,7 +2076,7 @@ int gr_gv11b_wait_empty(struct gk20a *g, unsigned long duration_ms, | |||
2081 | activity2 == 0 && | 2076 | activity2 == 0 && |
2082 | gr_activity_empty_or_preempted(activity4)); | 2077 | gr_activity_empty_or_preempted(activity4)); |
2083 | 2078 | ||
2084 | if (!gr_enabled || (!gr_busy && !ctxsw_active)) { | 2079 | if (!gr_busy && !ctxsw_active) { |
2085 | nvgpu_log_fn(g, "done"); | 2080 | nvgpu_log_fn(g, "done"); |
2086 | return 0; | 2081 | return 0; |
2087 | } | 2082 | } |