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-rw-r--r--drivers/gpu/nvgpu/gv100/nvlink_gv100.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
index e32b303d..df948301 100644
--- a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c
@@ -1485,12 +1485,8 @@ int gv100_nvlink_setup_pll(struct gk20a *g, unsigned long link_mask)
1485 1485
1486 reg = set_field(reg, top_nvhsclk_ctrl_e_clk_nvl_m(), 1486 reg = set_field(reg, top_nvhsclk_ctrl_e_clk_nvl_m(),
1487 top_nvhsclk_ctrl_e_clk_nvl_f(pad_ctrl)); 1487 top_nvhsclk_ctrl_e_clk_nvl_f(pad_ctrl));
1488 reg = set_field(reg, top_nvhsclk_ctrl_e_clk_core_m(),
1489 top_nvhsclk_ctrl_e_clk_core_f(0x1));
1490 reg = set_field(reg, top_nvhsclk_ctrl_swap_clk_nvl_m(), 1488 reg = set_field(reg, top_nvhsclk_ctrl_swap_clk_nvl_m(),
1491 top_nvhsclk_ctrl_swap_clk_nvl_f(swap_ctrl)); 1489 top_nvhsclk_ctrl_swap_clk_nvl_f(swap_ctrl));
1492 reg = set_field(reg, top_nvhsclk_ctrl_swap_clk_core_m(),
1493 top_nvhsclk_ctrl_swap_clk_core_f(0x0));
1494 1490
1495 gk20a_writel(g, top_nvhsclk_ctrl_r(), reg); 1491 gk20a_writel(g, top_nvhsclk_ctrl_r(), reg);
1496 1492