diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 143 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 61 |
2 files changed, 187 insertions, 17 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 110f3c5a..7cc248fa 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -522,6 +522,11 @@ static u16 get_pmu_init_msg_pmu_sw_mg_size_v0(union pmu_init_msg_pmu *init_msg) | |||
522 | return init->sw_managed_area_size; | 522 | return init->sw_managed_area_size; |
523 | } | 523 | } |
524 | 524 | ||
525 | static u32 get_pmu_perfmon_cmd_start_size_v2(void) | ||
526 | { | ||
527 | return sizeof(struct pmu_perfmon_cmd_start_v2); | ||
528 | } | ||
529 | |||
525 | static u32 get_pmu_perfmon_cmd_start_size_v1(void) | 530 | static u32 get_pmu_perfmon_cmd_start_size_v1(void) |
526 | { | 531 | { |
527 | return sizeof(struct pmu_perfmon_cmd_start_v1); | 532 | return sizeof(struct pmu_perfmon_cmd_start_v1); |
@@ -532,6 +537,20 @@ static u32 get_pmu_perfmon_cmd_start_size_v0(void) | |||
532 | return sizeof(struct pmu_perfmon_cmd_start_v0); | 537 | return sizeof(struct pmu_perfmon_cmd_start_v0); |
533 | } | 538 | } |
534 | 539 | ||
540 | static int get_perfmon_cmd_start_offsetofvar_v2( | ||
541 | enum pmu_perfmon_cmd_start_fields field) | ||
542 | { | ||
543 | switch (field) { | ||
544 | case COUNTER_ALLOC: | ||
545 | return offsetof(struct pmu_perfmon_cmd_start_v2, | ||
546 | counter_alloc); | ||
547 | default: | ||
548 | return -EINVAL; | ||
549 | } | ||
550 | |||
551 | return 0; | ||
552 | } | ||
553 | |||
535 | static int get_perfmon_cmd_start_offsetofvar_v1( | 554 | static int get_perfmon_cmd_start_offsetofvar_v1( |
536 | enum pmu_perfmon_cmd_start_fields field) | 555 | enum pmu_perfmon_cmd_start_fields field) |
537 | { | 556 | { |
@@ -541,8 +560,8 @@ static int get_perfmon_cmd_start_offsetofvar_v1( | |||
541 | counter_alloc); | 560 | counter_alloc); |
542 | default: | 561 | default: |
543 | return -EINVAL; | 562 | return -EINVAL; |
544 | break; | ||
545 | } | 563 | } |
564 | |||
546 | return 0; | 565 | return 0; |
547 | } | 566 | } |
548 | 567 | ||
@@ -560,6 +579,11 @@ static int get_perfmon_cmd_start_offsetofvar_v0( | |||
560 | return 0; | 579 | return 0; |
561 | } | 580 | } |
562 | 581 | ||
582 | static u32 get_pmu_perfmon_cmd_init_size_v2(void) | ||
583 | { | ||
584 | return sizeof(struct pmu_perfmon_cmd_init_v2); | ||
585 | } | ||
586 | |||
563 | static u32 get_pmu_perfmon_cmd_init_size_v1(void) | 587 | static u32 get_pmu_perfmon_cmd_init_size_v1(void) |
564 | { | 588 | { |
565 | return sizeof(struct pmu_perfmon_cmd_init_v1); | 589 | return sizeof(struct pmu_perfmon_cmd_init_v1); |
@@ -570,6 +594,20 @@ static u32 get_pmu_perfmon_cmd_init_size_v0(void) | |||
570 | return sizeof(struct pmu_perfmon_cmd_init_v0); | 594 | return sizeof(struct pmu_perfmon_cmd_init_v0); |
571 | } | 595 | } |
572 | 596 | ||
597 | static int get_perfmon_cmd_init_offsetofvar_v2( | ||
598 | enum pmu_perfmon_cmd_start_fields field) | ||
599 | { | ||
600 | switch (field) { | ||
601 | case COUNTER_ALLOC: | ||
602 | return offsetof(struct pmu_perfmon_cmd_init_v2, | ||
603 | counter_alloc); | ||
604 | default: | ||
605 | return -EINVAL; | ||
606 | break; | ||
607 | } | ||
608 | return 0; | ||
609 | } | ||
610 | |||
573 | static int get_perfmon_cmd_init_offsetofvar_v1( | 611 | static int get_perfmon_cmd_init_offsetofvar_v1( |
574 | enum pmu_perfmon_cmd_start_fields field) | 612 | enum pmu_perfmon_cmd_start_fields field) |
575 | { | 613 | { |
@@ -598,6 +636,12 @@ static int get_perfmon_cmd_init_offsetofvar_v0( | |||
598 | return 0; | 636 | return 0; |
599 | } | 637 | } |
600 | 638 | ||
639 | static void perfmon_start_set_cmd_type_v2(struct pmu_perfmon_cmd *pc, u8 value) | ||
640 | { | ||
641 | struct pmu_perfmon_cmd_start_v2 *start = &pc->start_v2; | ||
642 | start->cmd_type = value; | ||
643 | } | ||
644 | |||
601 | static void perfmon_start_set_cmd_type_v1(struct pmu_perfmon_cmd *pc, u8 value) | 645 | static void perfmon_start_set_cmd_type_v1(struct pmu_perfmon_cmd *pc, u8 value) |
602 | { | 646 | { |
603 | struct pmu_perfmon_cmd_start_v1 *start = &pc->start_v1; | 647 | struct pmu_perfmon_cmd_start_v1 *start = &pc->start_v1; |
@@ -610,6 +654,12 @@ static void perfmon_start_set_cmd_type_v0(struct pmu_perfmon_cmd *pc, u8 value) | |||
610 | start->cmd_type = value; | 654 | start->cmd_type = value; |
611 | } | 655 | } |
612 | 656 | ||
657 | static void perfmon_start_set_group_id_v2(struct pmu_perfmon_cmd *pc, u8 value) | ||
658 | { | ||
659 | struct pmu_perfmon_cmd_start_v2 *start = &pc->start_v2; | ||
660 | start->group_id = value; | ||
661 | } | ||
662 | |||
613 | static void perfmon_start_set_group_id_v1(struct pmu_perfmon_cmd *pc, u8 value) | 663 | static void perfmon_start_set_group_id_v1(struct pmu_perfmon_cmd *pc, u8 value) |
614 | { | 664 | { |
615 | struct pmu_perfmon_cmd_start_v1 *start = &pc->start_v1; | 665 | struct pmu_perfmon_cmd_start_v1 *start = &pc->start_v1; |
@@ -622,6 +672,12 @@ static void perfmon_start_set_group_id_v0(struct pmu_perfmon_cmd *pc, u8 value) | |||
622 | start->group_id = value; | 672 | start->group_id = value; |
623 | } | 673 | } |
624 | 674 | ||
675 | static void perfmon_start_set_state_id_v2(struct pmu_perfmon_cmd *pc, u8 value) | ||
676 | { | ||
677 | struct pmu_perfmon_cmd_start_v2 *start = &pc->start_v2; | ||
678 | start->state_id = value; | ||
679 | } | ||
680 | |||
625 | static void perfmon_start_set_state_id_v1(struct pmu_perfmon_cmd *pc, u8 value) | 681 | static void perfmon_start_set_state_id_v1(struct pmu_perfmon_cmd *pc, u8 value) |
626 | { | 682 | { |
627 | struct pmu_perfmon_cmd_start_v1 *start = &pc->start_v1; | 683 | struct pmu_perfmon_cmd_start_v1 *start = &pc->start_v1; |
@@ -634,6 +690,12 @@ static void perfmon_start_set_state_id_v0(struct pmu_perfmon_cmd *pc, u8 value) | |||
634 | start->state_id = value; | 690 | start->state_id = value; |
635 | } | 691 | } |
636 | 692 | ||
693 | static void perfmon_start_set_flags_v2(struct pmu_perfmon_cmd *pc, u8 value) | ||
694 | { | ||
695 | struct pmu_perfmon_cmd_start_v2 *start = &pc->start_v2; | ||
696 | start->flags = value; | ||
697 | } | ||
698 | |||
637 | static void perfmon_start_set_flags_v1(struct pmu_perfmon_cmd *pc, u8 value) | 699 | static void perfmon_start_set_flags_v1(struct pmu_perfmon_cmd *pc, u8 value) |
638 | { | 700 | { |
639 | struct pmu_perfmon_cmd_start_v1 *start = &pc->start_v1; | 701 | struct pmu_perfmon_cmd_start_v1 *start = &pc->start_v1; |
@@ -646,6 +708,12 @@ static void perfmon_start_set_flags_v0(struct pmu_perfmon_cmd *pc, u8 value) | |||
646 | start->flags = value; | 708 | start->flags = value; |
647 | } | 709 | } |
648 | 710 | ||
711 | static u8 perfmon_start_get_flags_v2(struct pmu_perfmon_cmd *pc) | ||
712 | { | ||
713 | struct pmu_perfmon_cmd_start_v2 *start = &pc->start_v2; | ||
714 | return start->flags; | ||
715 | } | ||
716 | |||
649 | static u8 perfmon_start_get_flags_v1(struct pmu_perfmon_cmd *pc) | 717 | static u8 perfmon_start_get_flags_v1(struct pmu_perfmon_cmd *pc) |
650 | { | 718 | { |
651 | struct pmu_perfmon_cmd_start_v1 *start = &pc->start_v1; | 719 | struct pmu_perfmon_cmd_start_v1 *start = &pc->start_v1; |
@@ -658,6 +726,14 @@ static u8 perfmon_start_get_flags_v0(struct pmu_perfmon_cmd *pc) | |||
658 | return start->flags; | 726 | return start->flags; |
659 | } | 727 | } |
660 | 728 | ||
729 | static void perfmon_cmd_init_set_sample_buffer_v2(struct pmu_perfmon_cmd *pc, | ||
730 | u16 value) | ||
731 | { | ||
732 | struct pmu_perfmon_cmd_init_v2 *init = &pc->init_v2; | ||
733 | init->sample_buffer = value; | ||
734 | } | ||
735 | |||
736 | |||
661 | static void perfmon_cmd_init_set_sample_buffer_v1(struct pmu_perfmon_cmd *pc, | 737 | static void perfmon_cmd_init_set_sample_buffer_v1(struct pmu_perfmon_cmd *pc, |
662 | u16 value) | 738 | u16 value) |
663 | { | 739 | { |
@@ -672,6 +748,13 @@ static void perfmon_cmd_init_set_sample_buffer_v0(struct pmu_perfmon_cmd *pc, | |||
672 | init->sample_buffer = value; | 748 | init->sample_buffer = value; |
673 | } | 749 | } |
674 | 750 | ||
751 | static void perfmon_cmd_init_set_dec_cnt_v2(struct pmu_perfmon_cmd *pc, | ||
752 | u8 value) | ||
753 | { | ||
754 | struct pmu_perfmon_cmd_init_v2 *init = &pc->init_v2; | ||
755 | init->to_decrease_count = value; | ||
756 | } | ||
757 | |||
675 | static void perfmon_cmd_init_set_dec_cnt_v1(struct pmu_perfmon_cmd *pc, | 758 | static void perfmon_cmd_init_set_dec_cnt_v1(struct pmu_perfmon_cmd *pc, |
676 | u8 value) | 759 | u8 value) |
677 | { | 760 | { |
@@ -686,6 +769,13 @@ static void perfmon_cmd_init_set_dec_cnt_v0(struct pmu_perfmon_cmd *pc, | |||
686 | init->to_decrease_count = value; | 769 | init->to_decrease_count = value; |
687 | } | 770 | } |
688 | 771 | ||
772 | static void perfmon_cmd_init_set_base_cnt_id_v2(struct pmu_perfmon_cmd *pc, | ||
773 | u8 value) | ||
774 | { | ||
775 | struct pmu_perfmon_cmd_init_v2 *init = &pc->init_v2; | ||
776 | init->base_counter_id = value; | ||
777 | } | ||
778 | |||
689 | static void perfmon_cmd_init_set_base_cnt_id_v1(struct pmu_perfmon_cmd *pc, | 779 | static void perfmon_cmd_init_set_base_cnt_id_v1(struct pmu_perfmon_cmd *pc, |
690 | u8 value) | 780 | u8 value) |
691 | { | 781 | { |
@@ -700,6 +790,13 @@ static void perfmon_cmd_init_set_base_cnt_id_v0(struct pmu_perfmon_cmd *pc, | |||
700 | init->base_counter_id = value; | 790 | init->base_counter_id = value; |
701 | } | 791 | } |
702 | 792 | ||
793 | static void perfmon_cmd_init_set_samp_period_us_v2(struct pmu_perfmon_cmd *pc, | ||
794 | u32 value) | ||
795 | { | ||
796 | struct pmu_perfmon_cmd_init_v2 *init = &pc->init_v2; | ||
797 | init->sample_period_us = value; | ||
798 | } | ||
799 | |||
703 | static void perfmon_cmd_init_set_samp_period_us_v1(struct pmu_perfmon_cmd *pc, | 800 | static void perfmon_cmd_init_set_samp_period_us_v1(struct pmu_perfmon_cmd *pc, |
704 | u32 value) | 801 | u32 value) |
705 | { | 802 | { |
@@ -714,6 +811,13 @@ static void perfmon_cmd_init_set_samp_period_us_v0(struct pmu_perfmon_cmd *pc, | |||
714 | init->sample_period_us = value; | 811 | init->sample_period_us = value; |
715 | } | 812 | } |
716 | 813 | ||
814 | static void perfmon_cmd_init_set_num_cnt_v2(struct pmu_perfmon_cmd *pc, | ||
815 | u8 value) | ||
816 | { | ||
817 | struct pmu_perfmon_cmd_init_v2 *init = &pc->init_v2; | ||
818 | init->num_counters = value; | ||
819 | } | ||
820 | |||
717 | static void perfmon_cmd_init_set_num_cnt_v1(struct pmu_perfmon_cmd *pc, | 821 | static void perfmon_cmd_init_set_num_cnt_v1(struct pmu_perfmon_cmd *pc, |
718 | u8 value) | 822 | u8 value) |
719 | { | 823 | { |
@@ -728,6 +832,13 @@ static void perfmon_cmd_init_set_num_cnt_v0(struct pmu_perfmon_cmd *pc, | |||
728 | init->num_counters = value; | 832 | init->num_counters = value; |
729 | } | 833 | } |
730 | 834 | ||
835 | static void perfmon_cmd_init_set_mov_avg_v2(struct pmu_perfmon_cmd *pc, | ||
836 | u8 value) | ||
837 | { | ||
838 | struct pmu_perfmon_cmd_init_v2 *init = &pc->init_v2; | ||
839 | init->samples_in_moving_avg = value; | ||
840 | } | ||
841 | |||
731 | static void perfmon_cmd_init_set_mov_avg_v1(struct pmu_perfmon_cmd *pc, | 842 | static void perfmon_cmd_init_set_mov_avg_v1(struct pmu_perfmon_cmd *pc, |
732 | u8 value) | 843 | u8 value) |
733 | { | 844 | { |
@@ -961,35 +1072,35 @@ int gk20a_init_pmu(struct pmu_gk20a *pmu) | |||
961 | g->ops.pmu_ver.get_pmu_init_msg_pmu_sw_mg_size = | 1072 | g->ops.pmu_ver.get_pmu_init_msg_pmu_sw_mg_size = |
962 | get_pmu_init_msg_pmu_sw_mg_size_v1; | 1073 | get_pmu_init_msg_pmu_sw_mg_size_v1; |
963 | g->ops.pmu_ver.get_pmu_perfmon_cmd_start_size = | 1074 | g->ops.pmu_ver.get_pmu_perfmon_cmd_start_size = |
964 | get_pmu_perfmon_cmd_start_size_v1; | 1075 | get_pmu_perfmon_cmd_start_size_v2; |
965 | g->ops.pmu_ver.get_perfmon_cmd_start_offsetofvar = | 1076 | g->ops.pmu_ver.get_perfmon_cmd_start_offsetofvar = |
966 | get_perfmon_cmd_start_offsetofvar_v1; | 1077 | get_perfmon_cmd_start_offsetofvar_v2; |
967 | g->ops.pmu_ver.perfmon_start_set_cmd_type = | 1078 | g->ops.pmu_ver.perfmon_start_set_cmd_type = |
968 | perfmon_start_set_cmd_type_v1; | 1079 | perfmon_start_set_cmd_type_v2; |
969 | g->ops.pmu_ver.perfmon_start_set_group_id = | 1080 | g->ops.pmu_ver.perfmon_start_set_group_id = |
970 | perfmon_start_set_group_id_v1; | 1081 | perfmon_start_set_group_id_v2; |
971 | g->ops.pmu_ver.perfmon_start_set_state_id = | 1082 | g->ops.pmu_ver.perfmon_start_set_state_id = |
972 | perfmon_start_set_state_id_v1; | 1083 | perfmon_start_set_state_id_v2; |
973 | g->ops.pmu_ver.perfmon_start_set_flags = | 1084 | g->ops.pmu_ver.perfmon_start_set_flags = |
974 | perfmon_start_set_flags_v1; | 1085 | perfmon_start_set_flags_v2; |
975 | g->ops.pmu_ver.perfmon_start_get_flags = | 1086 | g->ops.pmu_ver.perfmon_start_get_flags = |
976 | perfmon_start_get_flags_v1; | 1087 | perfmon_start_get_flags_v2; |
977 | g->ops.pmu_ver.get_pmu_perfmon_cmd_init_size = | 1088 | g->ops.pmu_ver.get_pmu_perfmon_cmd_init_size = |
978 | get_pmu_perfmon_cmd_init_size_v1; | 1089 | get_pmu_perfmon_cmd_init_size_v2; |
979 | g->ops.pmu_ver.get_perfmon_cmd_init_offsetofvar = | 1090 | g->ops.pmu_ver.get_perfmon_cmd_init_offsetofvar = |
980 | get_perfmon_cmd_init_offsetofvar_v1; | 1091 | get_perfmon_cmd_init_offsetofvar_v2; |
981 | g->ops.pmu_ver.perfmon_cmd_init_set_sample_buffer = | 1092 | g->ops.pmu_ver.perfmon_cmd_init_set_sample_buffer = |
982 | perfmon_cmd_init_set_sample_buffer_v1; | 1093 | perfmon_cmd_init_set_sample_buffer_v2; |
983 | g->ops.pmu_ver.perfmon_cmd_init_set_dec_cnt = | 1094 | g->ops.pmu_ver.perfmon_cmd_init_set_dec_cnt = |
984 | perfmon_cmd_init_set_dec_cnt_v1; | 1095 | perfmon_cmd_init_set_dec_cnt_v2; |
985 | g->ops.pmu_ver.perfmon_cmd_init_set_base_cnt_id = | 1096 | g->ops.pmu_ver.perfmon_cmd_init_set_base_cnt_id = |
986 | perfmon_cmd_init_set_base_cnt_id_v1; | 1097 | perfmon_cmd_init_set_base_cnt_id_v2; |
987 | g->ops.pmu_ver.perfmon_cmd_init_set_samp_period_us = | 1098 | g->ops.pmu_ver.perfmon_cmd_init_set_samp_period_us = |
988 | perfmon_cmd_init_set_samp_period_us_v1; | 1099 | perfmon_cmd_init_set_samp_period_us_v2; |
989 | g->ops.pmu_ver.perfmon_cmd_init_set_num_cnt = | 1100 | g->ops.pmu_ver.perfmon_cmd_init_set_num_cnt = |
990 | perfmon_cmd_init_set_num_cnt_v1; | 1101 | perfmon_cmd_init_set_num_cnt_v2; |
991 | g->ops.pmu_ver.perfmon_cmd_init_set_mov_avg = | 1102 | g->ops.pmu_ver.perfmon_cmd_init_set_mov_avg = |
992 | perfmon_cmd_init_set_mov_avg_v1; | 1103 | perfmon_cmd_init_set_mov_avg_v2; |
993 | g->ops.pmu_ver.get_pmu_seq_in_a_ptr = | 1104 | g->ops.pmu_ver.get_pmu_seq_in_a_ptr = |
994 | get_pmu_sequence_in_alloc_ptr_v1; | 1105 | get_pmu_sequence_in_alloc_ptr_v1; |
995 | g->ops.pmu_ver.get_pmu_seq_out_a_ptr = | 1106 | g->ops.pmu_ver.get_pmu_seq_out_a_ptr = |
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index e00991cb..0d7d7435 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |||
@@ -341,7 +341,7 @@ struct pmu_mem_desc_v0 { | |||
341 | /*! | 341 | /*! |
342 | * Start address of memory surface that is being communicated to the falcon. | 342 | * Start address of memory surface that is being communicated to the falcon. |
343 | */ | 343 | */ |
344 | u64 dma_addr; | 344 | struct falc_u64 dma_addr; |
345 | /*! | 345 | /*! |
346 | * Max allowed DMA transfer size (size of the memory surface). Accesses past | 346 | * Max allowed DMA transfer size (size of the memory surface). Accesses past |
347 | * this point may result in page faults and/or memory corruptions. | 347 | * this point may result in page faults and/or memory corruptions. |
@@ -679,6 +679,15 @@ enum { | |||
679 | PMU_PG_STAT_CMD_ALLOC_DMEM = 0, | 679 | PMU_PG_STAT_CMD_ALLOC_DMEM = 0, |
680 | }; | 680 | }; |
681 | 681 | ||
682 | #define PMU_PG_FEATURE_GR_SDIV_SLOWDOWN_ENABLED (1 << 0) | ||
683 | #define PMU_PG_FEATURE_GR_POWER_GATING_ENABLED (1 << 2) | ||
684 | |||
685 | struct pmu_pg_cmd_gr_init_param { | ||
686 | u8 cmd_type; | ||
687 | u16 sub_cmd_id; | ||
688 | u8 featuremask; | ||
689 | }; | ||
690 | |||
682 | struct pmu_pg_cmd_stat { | 691 | struct pmu_pg_cmd_stat { |
683 | u8 cmd_type; | 692 | u8 cmd_type; |
684 | u8 engine_id; | 693 | u8 engine_id; |
@@ -693,6 +702,7 @@ struct pmu_pg_cmd { | |||
693 | struct pmu_pg_cmd_eng_buf_load_v0 eng_buf_load_v0; | 702 | struct pmu_pg_cmd_eng_buf_load_v0 eng_buf_load_v0; |
694 | struct pmu_pg_cmd_eng_buf_load_v1 eng_buf_load_v1; | 703 | struct pmu_pg_cmd_eng_buf_load_v1 eng_buf_load_v1; |
695 | struct pmu_pg_cmd_stat stat; | 704 | struct pmu_pg_cmd_stat stat; |
705 | struct pmu_pg_cmd_gr_init_param gr_init_param; | ||
696 | /* TBD: other pg commands */ | 706 | /* TBD: other pg commands */ |
697 | union pmu_ap_cmd ap_cmd; | 707 | union pmu_ap_cmd ap_cmd; |
698 | }; | 708 | }; |
@@ -835,6 +845,14 @@ enum { | |||
835 | PMU_PERFMON_CMD_ID_INIT = 2 | 845 | PMU_PERFMON_CMD_ID_INIT = 2 |
836 | }; | 846 | }; |
837 | 847 | ||
848 | struct pmu_perfmon_cmd_start_v2 { | ||
849 | u8 cmd_type; | ||
850 | u8 group_id; | ||
851 | u8 state_id; | ||
852 | u8 flags; | ||
853 | struct pmu_allocation_v2 counter_alloc; | ||
854 | }; | ||
855 | |||
838 | struct pmu_perfmon_cmd_start_v1 { | 856 | struct pmu_perfmon_cmd_start_v1 { |
839 | u8 cmd_type; | 857 | u8 cmd_type; |
840 | u8 group_id; | 858 | u8 group_id; |
@@ -855,6 +873,17 @@ struct pmu_perfmon_cmd_stop { | |||
855 | u8 cmd_type; | 873 | u8 cmd_type; |
856 | }; | 874 | }; |
857 | 875 | ||
876 | struct pmu_perfmon_cmd_init_v2 { | ||
877 | u8 cmd_type; | ||
878 | u8 to_decrease_count; | ||
879 | u8 base_counter_id; | ||
880 | u32 sample_period_us; | ||
881 | struct pmu_allocation_v2 counter_alloc; | ||
882 | u8 num_counters; | ||
883 | u8 samples_in_moving_avg; | ||
884 | u16 sample_buffer; | ||
885 | }; | ||
886 | |||
858 | struct pmu_perfmon_cmd_init_v1 { | 887 | struct pmu_perfmon_cmd_init_v1 { |
859 | u8 cmd_type; | 888 | u8 cmd_type; |
860 | u8 to_decrease_count; | 889 | u8 to_decrease_count; |
@@ -882,9 +911,11 @@ struct pmu_perfmon_cmd { | |||
882 | u8 cmd_type; | 911 | u8 cmd_type; |
883 | struct pmu_perfmon_cmd_start_v0 start_v0; | 912 | struct pmu_perfmon_cmd_start_v0 start_v0; |
884 | struct pmu_perfmon_cmd_start_v1 start_v1; | 913 | struct pmu_perfmon_cmd_start_v1 start_v1; |
914 | struct pmu_perfmon_cmd_start_v2 start_v2; | ||
885 | struct pmu_perfmon_cmd_stop stop; | 915 | struct pmu_perfmon_cmd_stop stop; |
886 | struct pmu_perfmon_cmd_init_v0 init_v0; | 916 | struct pmu_perfmon_cmd_init_v0 init_v0; |
887 | struct pmu_perfmon_cmd_init_v1 init_v1; | 917 | struct pmu_perfmon_cmd_init_v1 init_v1; |
918 | struct pmu_perfmon_cmd_init_v2 init_v2; | ||
888 | }; | 919 | }; |
889 | }; | 920 | }; |
890 | 921 | ||
@@ -1102,6 +1133,34 @@ struct pmu_sequence { | |||
1102 | void* cb_params; | 1133 | void* cb_params; |
1103 | }; | 1134 | }; |
1104 | 1135 | ||
1136 | struct pmu_pg_stats_v1 { | ||
1137 | /* Number of time PMU successfully engaged sleep state */ | ||
1138 | u32 entryCount; | ||
1139 | /* Number of time PMU exit sleep state */ | ||
1140 | u32 exitCount; | ||
1141 | /* Number of time PMU aborted in entry sequence */ | ||
1142 | u32 abortCount; | ||
1143 | /* | ||
1144 | * Time for which GPU was neither in Sleep state not | ||
1145 | * executing sleep sequence. | ||
1146 | * */ | ||
1147 | u32 poweredUpTimeUs; | ||
1148 | /* Entry and exit latency of current sleep cycle */ | ||
1149 | u32 entryLatencyUs; | ||
1150 | u32 exitLatencyUs; | ||
1151 | /* Resident time for current sleep cycle. */ | ||
1152 | u32 residentTimeUs; | ||
1153 | /* Rolling average entry and exit latencies */ | ||
1154 | u32 entryLatencyAvgUs; | ||
1155 | u32 exitLatencyAvgUs; | ||
1156 | /* Max entry and exit latencies */ | ||
1157 | u32 entryLatencyMaxUs; | ||
1158 | u32 exitLatencyMaxUs; | ||
1159 | /* Total time spent in sleep and non-sleep state */ | ||
1160 | u32 totalSleepTimeUs; | ||
1161 | u32 totalNonSleepTimeUs; | ||
1162 | }; | ||
1163 | |||
1105 | struct pmu_pg_stats { | 1164 | struct pmu_pg_stats { |
1106 | u64 pg_entry_start_timestamp; | 1165 | u64 pg_entry_start_timestamp; |
1107 | u64 pg_ingating_start_timestamp; | 1166 | u64 pg_ingating_start_timestamp; |