diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/sysfs.c | 48 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 9 |
4 files changed, 54 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/sysfs.c b/drivers/gpu/nvgpu/common/linux/sysfs.c index 7b614023..6897fae8 100644 --- a/drivers/gpu/nvgpu/common/linux/sysfs.c +++ b/drivers/gpu/nvgpu/common/linux/sysfs.c | |||
@@ -954,6 +954,52 @@ static ssize_t pd_max_batches_read(struct device *dev, | |||
954 | 954 | ||
955 | static DEVICE_ATTR(pd_max_batches, ROOTRW, pd_max_batches_read, pd_max_batches_store); | 955 | static DEVICE_ATTR(pd_max_batches, ROOTRW, pd_max_batches_read, pd_max_batches_store); |
956 | 956 | ||
957 | static ssize_t gfxp_wfi_timeout_count_store(struct device *dev, | ||
958 | struct device_attribute *attr, const char *buf, size_t count) | ||
959 | { | ||
960 | struct gk20a *g = get_gk20a(dev); | ||
961 | struct gr_gk20a *gr = &g->gr; | ||
962 | unsigned long val = 0; | ||
963 | int err = -1; | ||
964 | |||
965 | if (kstrtoul(buf, 10, &val) < 0) | ||
966 | return -EINVAL; | ||
967 | |||
968 | if (val >= 100*1000*1000) /* 100ms @ 1Ghz */ | ||
969 | return -EINVAL; | ||
970 | |||
971 | gr->gfxp_wfi_timeout_count = val; | ||
972 | |||
973 | if (g->ops.gr.init_preemption_state && g->power_on) { | ||
974 | err = gk20a_busy(g); | ||
975 | if (err) | ||
976 | return err; | ||
977 | |||
978 | err = gr_gk20a_elpg_protected_call(g, | ||
979 | g->ops.gr.init_preemption_state(g)); | ||
980 | |||
981 | gk20a_idle(g); | ||
982 | |||
983 | if (err) | ||
984 | return err; | ||
985 | } | ||
986 | |||
987 | return count; | ||
988 | } | ||
989 | |||
990 | static ssize_t gfxp_wfi_timeout_count_read(struct device *dev, | ||
991 | struct device_attribute *attr, char *buf) | ||
992 | { | ||
993 | struct gk20a *g = get_gk20a(dev); | ||
994 | struct gr_gk20a *gr = &g->gr; | ||
995 | u32 val = gr->gfxp_wfi_timeout_count; | ||
996 | |||
997 | return snprintf(buf, PAGE_SIZE, "%d\n", val); | ||
998 | } | ||
999 | |||
1000 | static DEVICE_ATTR(gfxp_wfi_timeout_count, (S_IRWXU|S_IRGRP|S_IROTH), | ||
1001 | gfxp_wfi_timeout_count_read, gfxp_wfi_timeout_count_store); | ||
1002 | |||
957 | 1003 | ||
958 | void nvgpu_remove_sysfs(struct device *dev) | 1004 | void nvgpu_remove_sysfs(struct device *dev) |
959 | { | 1005 | { |
@@ -989,6 +1035,7 @@ void nvgpu_remove_sysfs(struct device *dev) | |||
989 | 1035 | ||
990 | device_remove_file(dev, &dev_attr_czf_bypass); | 1036 | device_remove_file(dev, &dev_attr_czf_bypass); |
991 | device_remove_file(dev, &dev_attr_pd_max_batches); | 1037 | device_remove_file(dev, &dev_attr_pd_max_batches); |
1038 | device_remove_file(dev, &dev_attr_gfxp_wfi_timeout_count); | ||
992 | 1039 | ||
993 | if (strcmp(dev_name(dev), "gpu.0")) { | 1040 | if (strcmp(dev_name(dev), "gpu.0")) { |
994 | struct kobject *kobj = &dev->kobj; | 1041 | struct kobject *kobj = &dev->kobj; |
@@ -1035,6 +1082,7 @@ int nvgpu_create_sysfs(struct device *dev) | |||
1035 | 1082 | ||
1036 | error |= device_create_file(dev, &dev_attr_czf_bypass); | 1083 | error |= device_create_file(dev, &dev_attr_czf_bypass); |
1037 | error |= device_create_file(dev, &dev_attr_pd_max_batches); | 1084 | error |= device_create_file(dev, &dev_attr_pd_max_batches); |
1085 | error |= device_create_file(dev, &dev_attr_gfxp_wfi_timeout_count); | ||
1038 | 1086 | ||
1039 | if (strcmp(dev_name(dev), "gpu.0")) { | 1087 | if (strcmp(dev_name(dev), "gpu.0")) { |
1040 | struct kobject *kobj = &dev->kobj; | 1088 | struct kobject *kobj = &dev->kobj; |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 2fd6f72c..71fe44a3 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -78,6 +78,7 @@ | |||
78 | #define CTXSW_MEM_SCRUBBING_TIMEOUT_DEFAULT 10 | 78 | #define CTXSW_MEM_SCRUBBING_TIMEOUT_DEFAULT 10 |
79 | #define FECS_ARB_CMD_TIMEOUT_MAX 40 | 79 | #define FECS_ARB_CMD_TIMEOUT_MAX 40 |
80 | #define FECS_ARB_CMD_TIMEOUT_DEFAULT 2 | 80 | #define FECS_ARB_CMD_TIMEOUT_DEFAULT 2 |
81 | #define GFXP_WFI_TIMEOUT_COUNT_DEFAULT 100000 | ||
81 | 82 | ||
82 | static int gk20a_init_gr_bind_fecs_elpg(struct gk20a *g); | 83 | static int gk20a_init_gr_bind_fecs_elpg(struct gk20a *g); |
83 | 84 | ||
@@ -4841,6 +4842,8 @@ static int gk20a_init_gr_setup_sw(struct gk20a *g) | |||
4841 | if (g->ops.gr.init_czf_bypass) | 4842 | if (g->ops.gr.init_czf_bypass) |
4842 | g->ops.gr.init_czf_bypass(g); | 4843 | g->ops.gr.init_czf_bypass(g); |
4843 | 4844 | ||
4845 | gr->gfxp_wfi_timeout_count = GFXP_WFI_TIMEOUT_COUNT_DEFAULT; | ||
4846 | |||
4844 | nvgpu_mutex_init(&gr->ctx_mutex); | 4847 | nvgpu_mutex_init(&gr->ctx_mutex); |
4845 | nvgpu_spinlock_init(&gr->ch_tlb_lock); | 4848 | nvgpu_spinlock_init(&gr->ch_tlb_lock); |
4846 | 4849 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index 22fc40d1..0a685d01 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h | |||
@@ -343,6 +343,7 @@ struct gr_gk20a { | |||
343 | u32 timeslice_mode; | 343 | u32 timeslice_mode; |
344 | u32 czf_bypass; | 344 | u32 czf_bypass; |
345 | u32 pd_max_batches; | 345 | u32 pd_max_batches; |
346 | u32 gfxp_wfi_timeout_count; | ||
346 | 347 | ||
347 | struct gr_ctx_buffer_desc global_ctx_buffer[NR_GLOBAL_CTX_BUF]; | 348 | struct gr_ctx_buffer_desc global_ctx_buffer[NR_GLOBAL_CTX_BUF]; |
348 | 349 | ||
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index a6d72907..78be072f 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -49,8 +49,6 @@ | |||
49 | #include <nvgpu/hw/gp10b/hw_mc_gp10b.h> | 49 | #include <nvgpu/hw/gp10b/hw_mc_gp10b.h> |
50 | #include <nvgpu/hw/gp10b/hw_fuse_gp10b.h> | 50 | #include <nvgpu/hw/gp10b/hw_fuse_gp10b.h> |
51 | 51 | ||
52 | #define NVGPU_GFXP_WFI_TIMEOUT_US 100LL | ||
53 | |||
54 | bool gr_gp10b_is_valid_class(struct gk20a *g, u32 class_num) | 52 | bool gr_gp10b_is_valid_class(struct gk20a *g, u32 class_num) |
55 | { | 53 | { |
56 | bool valid = false; | 54 | bool valid = false; |
@@ -2336,11 +2334,8 @@ int gp10b_gr_fuse_override(struct gk20a *g) | |||
2336 | int gr_gp10b_init_preemption_state(struct gk20a *g) | 2334 | int gr_gp10b_init_preemption_state(struct gk20a *g) |
2337 | { | 2335 | { |
2338 | u32 debug_2; | 2336 | u32 debug_2; |
2339 | u64 sysclk_rate; | 2337 | struct gr_gk20a *gr = &g->gr; |
2340 | u32 sysclk_cycles; | 2338 | u32 sysclk_cycles = gr->gfxp_wfi_timeout_count; |
2341 | |||
2342 | sysclk_rate = g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPCCLK); | ||
2343 | sysclk_cycles = (u32)((sysclk_rate * NVGPU_GFXP_WFI_TIMEOUT_US) / 1000000ULL); | ||
2344 | gk20a_writel(g, gr_fe_gfxp_wfi_timeout_r(), | 2339 | gk20a_writel(g, gr_fe_gfxp_wfi_timeout_r(), |
2345 | gr_fe_gfxp_wfi_timeout_count_f(sysclk_cycles)); | 2340 | gr_fe_gfxp_wfi_timeout_count_f(sysclk_cycles)); |
2346 | 2341 | ||