diff options
Diffstat (limited to 'drivers/gpu/nvgpu/volt')
-rw-r--r-- | drivers/gpu/nvgpu/volt/volt_pmu.c | 18 |
1 files changed, 7 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/volt/volt_pmu.c b/drivers/gpu/nvgpu/volt/volt_pmu.c index 4608918c..07bff84a 100644 --- a/drivers/gpu/nvgpu/volt/volt_pmu.c +++ b/drivers/gpu/nvgpu/volt/volt_pmu.c | |||
@@ -32,7 +32,8 @@ | |||
32 | 32 | ||
33 | #include "volt.h" | 33 | #include "volt.h" |
34 | 34 | ||
35 | #define RAIL_COUNT 2 | 35 | #define RAIL_COUNT_GP 2 |
36 | #define RAIL_COUNT_GV 1 | ||
36 | 37 | ||
37 | struct volt_rpc_pmucmdhandler_params { | 38 | struct volt_rpc_pmucmdhandler_params { |
38 | struct nv_pmu_volt_rpc *prpc_call; | 39 | struct nv_pmu_volt_rpc *prpc_call; |
@@ -202,7 +203,7 @@ u32 nvgpu_volt_rail_get_voltage_gv10x(struct gk20a *g, | |||
202 | sizeof(struct nv_pmu_rpc_struct_volt_volt_rail_get_voltage)); | 203 | sizeof(struct nv_pmu_rpc_struct_volt_volt_rail_get_voltage)); |
203 | rpc.rail_idx = rail_idx; | 204 | rpc.rail_idx = rail_idx; |
204 | 205 | ||
205 | PMU_RPC_EXECUTE_CPB(status, pmu, VOLT, VOLT_SET_VOLTAGE, &rpc, 0); | 206 | PMU_RPC_EXECUTE_CPB(status, pmu, VOLT, VOLT_RAIL_GET_VOLTAGE, &rpc, 0); |
206 | if (status) { | 207 | if (status) { |
207 | nvgpu_err(g, "Failed to execute RPC status=0x%x", | 208 | nvgpu_err(g, "Failed to execute RPC status=0x%x", |
208 | status); | 209 | status); |
@@ -275,7 +276,7 @@ static u32 volt_set_voltage_gv10x_rpc(struct gk20a *g, u8 client_id, | |||
275 | rpc.client_id = 0x1; | 276 | rpc.client_id = 0x1; |
276 | rpc.rail_list = *prail_list; | 277 | rpc.rail_list = *prail_list; |
277 | 278 | ||
278 | PMU_RPC_EXECUTE(status, pmu, VOLT, VOLT_SET_VOLTAGE, &rpc, 0); | 279 | PMU_RPC_EXECUTE_CPB(status, pmu, VOLT, VOLT_SET_VOLTAGE, &rpc, 0); |
279 | if (status) { | 280 | if (status) { |
280 | nvgpu_err(g, "Failed to execute RPC status=0x%x", | 281 | nvgpu_err(g, "Failed to execute RPC status=0x%x", |
281 | status); | 282 | status); |
@@ -290,17 +291,12 @@ u32 nvgpu_volt_set_voltage_gv10x(struct gk20a *g, u32 logic_voltage_uv, | |||
290 | int status = 0; | 291 | int status = 0; |
291 | struct ctrl_volt_volt_rail_list_v1 rail_list = { 0 }; | 292 | struct ctrl_volt_volt_rail_list_v1 rail_list = { 0 }; |
292 | 293 | ||
293 | rail_list.num_rails = RAIL_COUNT; | 294 | rail_list.num_rails = RAIL_COUNT_GV; |
294 | rail_list.rails[0].rail_idx = | 295 | rail_list.rails[0].rail_idx = |
295 | volt_rail_volt_domain_convert_to_idx(g, | 296 | volt_rail_volt_domain_convert_to_idx(g, |
296 | CTRL_VOLT_DOMAIN_LOGIC); | 297 | CTRL_VOLT_DOMAIN_LOGIC); |
297 | rail_list.rails[0].voltage_uv = logic_voltage_uv; | 298 | rail_list.rails[0].voltage_uv = logic_voltage_uv; |
298 | rail_list.rails[0].voltage_min_noise_unaware_uv = logic_voltage_uv; | 299 | rail_list.rails[0].voltage_min_noise_unaware_uv = logic_voltage_uv; |
299 | rail_list.rails[1].rail_idx = | ||
300 | volt_rail_volt_domain_convert_to_idx(g, | ||
301 | CTRL_VOLT_DOMAIN_SRAM); | ||
302 | rail_list.rails[1].voltage_uv = sram_voltage_uv; | ||
303 | rail_list.rails[1].voltage_min_noise_unaware_uv = sram_voltage_uv; | ||
304 | 300 | ||
305 | status = volt_set_voltage_gv10x_rpc(g, | 301 | status = volt_set_voltage_gv10x_rpc(g, |
306 | CTRL_VOLT_POLICY_CLIENT_PERF_CORE_VF_SEQ, &rail_list); | 302 | CTRL_VOLT_POLICY_CLIENT_PERF_CORE_VF_SEQ, &rail_list); |
@@ -314,7 +310,7 @@ u32 nvgpu_volt_set_voltage_gp10x(struct gk20a *g, u32 logic_voltage_uv, | |||
314 | int status = 0; | 310 | int status = 0; |
315 | struct ctrl_perf_volt_rail_list rail_list = { 0 }; | 311 | struct ctrl_perf_volt_rail_list rail_list = { 0 }; |
316 | 312 | ||
317 | rail_list.num_rails = RAIL_COUNT; | 313 | rail_list.num_rails = RAIL_COUNT_GP; |
318 | rail_list.rails[0].volt_domain = CTRL_VOLT_DOMAIN_LOGIC; | 314 | rail_list.rails[0].volt_domain = CTRL_VOLT_DOMAIN_LOGIC; |
319 | rail_list.rails[0].voltage_uv = logic_voltage_uv; | 315 | rail_list.rails[0].voltage_uv = logic_voltage_uv; |
320 | rail_list.rails[0].voltage_min_noise_unaware_uv = logic_voltage_uv; | 316 | rail_list.rails[0].voltage_min_noise_unaware_uv = logic_voltage_uv; |
@@ -370,7 +366,7 @@ int volt_set_noiseaware_vmin(struct gk20a *g, u32 logic_voltage_uv, | |||
370 | int status = 0; | 366 | int status = 0; |
371 | struct ctrl_volt_volt_rail_list rail_list = { 0 }; | 367 | struct ctrl_volt_volt_rail_list rail_list = { 0 }; |
372 | 368 | ||
373 | rail_list.num_rails = RAIL_COUNT; | 369 | rail_list.num_rails = RAIL_COUNT_GP; |
374 | rail_list.rails[0].rail_idx = 0; | 370 | rail_list.rails[0].rail_idx = 0; |
375 | rail_list.rails[0].voltage_uv = logic_voltage_uv; | 371 | rail_list.rails[0].voltage_uv = logic_voltage_uv; |
376 | rail_list.rails[1].rail_idx = 1; | 372 | rail_list.rails[1].rail_idx = 1; |