4 files changed, 1 insertions, 26 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.h b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.h
index ecaaaf23..20205d3c 100644
--- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.h
+++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.h
@@ -61,5 +61,5 @@ int vgpu_tsg_bind_channel(struct tsg_gk20a *tsg,
 int vgpu_tsg_unbind_channel(struct channel_gk20a *ch);
 int vgpu_tsg_set_timeslice(struct tsg_gk20a *tsg, u32 timeslice);
 int vgpu_enable_tsg(struct tsg_gk20a *tsg);
-int vgpu_set_sm_exception_type_mask(struct channel_gk20a *ch, u32 mask);
+
 #endif
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
index 03839858..2ec08ae6 100644
--- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
+++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
@@ -358,7 +358,6 @@ static const struct gpu_ops vgpu_gp10b_ops = {
                 .get_sema_wait_cmd_size = gk20a_fifo_get_sema_wait_cmd_size,
                 .get_sema_incr_cmd_size = gk20a_fifo_get_sema_incr_cmd_size,
                 .add_sema_cmd = gk20a_fifo_add_sema_cmd,
-                .set_sm_exception_type_mask = gk20a_tsg_set_sm_exception_type_mask,
         },
         .gr_ctx = {
                 .get_netlist_name = gr_gp10b_get_netlist_name,
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
index e3d042cf..eac57433 100644
--- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
+++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
@@ -424,7 +424,6 @@ static const struct gpu_ops vgpu_gv11b_ops = {
                 .get_sema_wait_cmd_size = gv11b_fifo_get_sema_wait_cmd_size,
                 .get_sema_incr_cmd_size = gv11b_fifo_get_sema_incr_cmd_size,
                 .add_sema_cmd = gv11b_fifo_add_sema_cmd,
-                .set_sm_exception_type_mask = vgpu_set_sm_exception_type_mask,
         },
         .gr_ctx = {
                 .get_netlist_name = gr_gv11b_get_netlist_name,
diff --git a/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c b/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c
index cd733f9d..a81b5022 100644
--- a/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c
@@ -163,26 +163,3 @@ int vgpu_tsg_set_timeslice(struct tsg_gk20a *tsg, u32 timeslice)
 
         return err;
 }
-
-int vgpu_set_sm_exception_type_mask(struct channel_gk20a *ch,
-                u32 exception_mask)
-{
-        struct tegra_vgpu_cmd_msg msg;
-        struct tegra_vgpu_set_sm_exception_type_mask_params *p =
-                &msg.params.set_sm_exception_mask;
-        int err = 0;
-        struct gk20a *g = ch->g;
-
-        nvgpu_log_fn(g, " ");
-
-        msg.cmd = TEGRA_VGPU_CMD_SET_SM_EXCEPTION_TYPE_MASK;
-        msg.handle = vgpu_get_handle(g);
-        p->handle = ch->virt_ctx;
-        p->mask = exception_mask;
-        err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
-        err = err ? err : msg.ret;
-        WARN_ON(err);
-
-        return err;
-}
-