diff options
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 9 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/vgpu.c | 56 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/vgpu.h | 1 |
3 files changed, 38 insertions, 28 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index baab42c8..9a8c319b 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |||
@@ -237,6 +237,7 @@ static int vgpu_init_fifo_setup_sw(struct gk20a *g) | |||
237 | { | 237 | { |
238 | struct fifo_gk20a *f = &g->fifo; | 238 | struct fifo_gk20a *f = &g->fifo; |
239 | struct device *d = dev_from_gk20a(g); | 239 | struct device *d = dev_from_gk20a(g); |
240 | struct vgpu_priv_data *priv = vgpu_get_priv_data(g); | ||
240 | int chid, err = 0; | 241 | int chid, err = 0; |
241 | 242 | ||
242 | gk20a_dbg_fn(""); | 243 | gk20a_dbg_fn(""); |
@@ -247,13 +248,7 @@ static int vgpu_init_fifo_setup_sw(struct gk20a *g) | |||
247 | } | 248 | } |
248 | 249 | ||
249 | f->g = g; | 250 | f->g = g; |
250 | 251 | f->num_channels = priv->constants.num_channels; | |
251 | err = vgpu_get_attribute(vgpu_get_handle(g), | ||
252 | TEGRA_VGPU_ATTRIB_NUM_CHANNELS, | ||
253 | &f->num_channels); | ||
254 | if (err) | ||
255 | return -ENXIO; | ||
256 | |||
257 | f->max_engines = nvgpu_get_litter_value(g, GPU_LIT_HOST_NUM_ENGINES); | 252 | f->max_engines = nvgpu_get_litter_value(g, GPU_LIT_HOST_NUM_ENGINES); |
258 | 253 | ||
259 | f->userd_entry_size = 1 << ram_userd_base_shift_v(); | 254 | f->userd_entry_size = 1 << ram_userd_base_shift_v(); |
diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.c b/drivers/gpu/nvgpu/vgpu/vgpu.c index 300ffc98..f5aef512 100644 --- a/drivers/gpu/nvgpu/vgpu/vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/vgpu.c | |||
@@ -271,22 +271,11 @@ int vgpu_pm_prepare_poweroff(struct device *dev) | |||
271 | static void vgpu_detect_chip(struct gk20a *g) | 271 | static void vgpu_detect_chip(struct gk20a *g) |
272 | { | 272 | { |
273 | struct nvgpu_gpu_characteristics *gpu = &g->gpu_characteristics; | 273 | struct nvgpu_gpu_characteristics *gpu = &g->gpu_characteristics; |
274 | struct vgpu_priv_data *priv = vgpu_get_priv_data(g); | ||
274 | 275 | ||
275 | u32 mc_boot_0_value; | 276 | gpu->arch = priv->constants.arch; |
276 | 277 | gpu->impl = priv->constants.impl; | |
277 | if (vgpu_get_attribute(vgpu_get_handle(g), | 278 | gpu->rev = priv->constants.rev; |
278 | TEGRA_VGPU_ATTRIB_PMC_BOOT_0, | ||
279 | &mc_boot_0_value)) { | ||
280 | gk20a_err(dev_from_gk20a(g), "failed to detect chip"); | ||
281 | return; | ||
282 | } | ||
283 | |||
284 | gpu->arch = mc_boot_0_architecture_v(mc_boot_0_value) << | ||
285 | NVGPU_GPU_ARCHITECTURE_SHIFT; | ||
286 | gpu->impl = mc_boot_0_implementation_v(mc_boot_0_value); | ||
287 | gpu->rev = | ||
288 | (mc_boot_0_major_revision_v(mc_boot_0_value) << 4) | | ||
289 | mc_boot_0_minor_revision_v(mc_boot_0_value); | ||
290 | 279 | ||
291 | gk20a_dbg_info("arch: %x, impl: %x, rev: %x\n", | 280 | gk20a_dbg_info("arch: %x, impl: %x, rev: %x\n", |
292 | g->gpu_characteristics.arch, | 281 | g->gpu_characteristics.arch, |
@@ -296,7 +285,7 @@ static void vgpu_detect_chip(struct gk20a *g) | |||
296 | 285 | ||
297 | static int vgpu_init_gpu_characteristics(struct gk20a *g) | 286 | static int vgpu_init_gpu_characteristics(struct gk20a *g) |
298 | { | 287 | { |
299 | u32 max_freq; | 288 | struct vgpu_priv_data *priv = vgpu_get_priv_data(g); |
300 | int err; | 289 | int err; |
301 | 290 | ||
302 | gk20a_dbg_fn(""); | 291 | gk20a_dbg_fn(""); |
@@ -305,11 +294,7 @@ static int vgpu_init_gpu_characteristics(struct gk20a *g) | |||
305 | if (err) | 294 | if (err) |
306 | return err; | 295 | return err; |
307 | 296 | ||
308 | if (vgpu_get_attribute(vgpu_get_handle(g), | 297 | g->gpu_characteristics.max_freq = priv->constants.max_freq; |
309 | TEGRA_VGPU_ATTRIB_MAX_FREQ, &max_freq)) | ||
310 | return -ENOMEM; | ||
311 | |||
312 | g->gpu_characteristics.max_freq = max_freq; | ||
313 | g->gpu_characteristics.map_buffer_batch_limit = 0; | 298 | g->gpu_characteristics.map_buffer_batch_limit = 0; |
314 | return 0; | 299 | return 0; |
315 | } | 300 | } |
@@ -500,6 +485,29 @@ static int vgpu_pm_init(struct device *dev) | |||
500 | return err; | 485 | return err; |
501 | } | 486 | } |
502 | 487 | ||
488 | static int vgpu_get_constants(struct gk20a *g) | ||
489 | { | ||
490 | struct tegra_vgpu_cmd_msg msg = {}; | ||
491 | struct tegra_vgpu_constants_params *p = &msg.params.constants; | ||
492 | struct vgpu_priv_data *priv = vgpu_get_priv_data(g); | ||
493 | int err; | ||
494 | |||
495 | gk20a_dbg_fn(""); | ||
496 | |||
497 | msg.cmd = TEGRA_VGPU_CMD_GET_CONSTANTS; | ||
498 | msg.handle = vgpu_get_handle(g); | ||
499 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
500 | err = err ? err : msg.ret; | ||
501 | |||
502 | if (unlikely(err)) { | ||
503 | gk20a_err(g->dev, "%s failed, err=%d", __func__, err); | ||
504 | return err; | ||
505 | } | ||
506 | |||
507 | priv->constants = *p; | ||
508 | return 0; | ||
509 | } | ||
510 | |||
503 | int vgpu_probe(struct platform_device *pdev) | 511 | int vgpu_probe(struct platform_device *pdev) |
504 | { | 512 | { |
505 | struct gk20a *gk20a; | 513 | struct gk20a *gk20a; |
@@ -573,6 +581,12 @@ int vgpu_probe(struct platform_device *pdev) | |||
573 | return -ENOSYS; | 581 | return -ENOSYS; |
574 | } | 582 | } |
575 | 583 | ||
584 | err = vgpu_get_constants(gk20a); | ||
585 | if (err) { | ||
586 | vgpu_comm_deinit(); | ||
587 | return err; | ||
588 | } | ||
589 | |||
576 | priv->intr_handler = kthread_run(vgpu_intr_thread, gk20a, "gk20a"); | 590 | priv->intr_handler = kthread_run(vgpu_intr_thread, gk20a, "gk20a"); |
577 | if (IS_ERR(priv->intr_handler)) | 591 | if (IS_ERR(priv->intr_handler)) |
578 | return -ENOMEM; | 592 | return -ENOMEM; |
diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.h b/drivers/gpu/nvgpu/vgpu/vgpu.h index e1fff966..6f1059b8 100644 --- a/drivers/gpu/nvgpu/vgpu/vgpu.h +++ b/drivers/gpu/nvgpu/vgpu/vgpu.h | |||
@@ -25,6 +25,7 @@ | |||
25 | struct vgpu_priv_data { | 25 | struct vgpu_priv_data { |
26 | u64 virt_handle; | 26 | u64 virt_handle; |
27 | struct task_struct *intr_handler; | 27 | struct task_struct *intr_handler; |
28 | struct tegra_vgpu_constants_params constants; | ||
28 | }; | 29 | }; |
29 | 30 | ||
30 | static inline | 31 | static inline |