diff options
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/gr_vgpu.c')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gr_vgpu.c | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c index 8d0bb6cf..f6f12c7b 100644 --- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c | |||
@@ -661,6 +661,81 @@ static u32 vgpu_gr_get_fbp_en_mask(struct gk20a *g) | |||
661 | return fbp_en_mask; | 661 | return fbp_en_mask; |
662 | } | 662 | } |
663 | 663 | ||
664 | static int vgpu_gr_add_zbc(struct gk20a *g, struct gr_gk20a *gr, | ||
665 | struct zbc_entry *zbc_val) | ||
666 | { | ||
667 | struct gk20a_platform *platform = gk20a_get_platform(g->dev); | ||
668 | struct tegra_vgpu_cmd_msg msg = {0}; | ||
669 | struct tegra_vgpu_zbc_set_table_params *p = &msg.params.zbc_set_table; | ||
670 | int err; | ||
671 | |||
672 | gk20a_dbg_fn(""); | ||
673 | |||
674 | msg.cmd = TEGRA_VGPU_CMD_ZBC_SET_TABLE; | ||
675 | msg.handle = platform->virt_handle; | ||
676 | |||
677 | p->type = zbc_val->type; | ||
678 | p->format = zbc_val->format; | ||
679 | switch (p->type) { | ||
680 | case GK20A_ZBC_TYPE_COLOR: | ||
681 | memcpy(p->color_ds, zbc_val->color_ds, sizeof(p->color_ds)); | ||
682 | memcpy(p->color_l2, zbc_val->color_l2, sizeof(p->color_l2)); | ||
683 | break; | ||
684 | case GK20A_ZBC_TYPE_DEPTH: | ||
685 | p->depth = zbc_val->depth; | ||
686 | break; | ||
687 | default: | ||
688 | return -EINVAL; | ||
689 | } | ||
690 | |||
691 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
692 | |||
693 | return (err || msg.ret) ? -ENOMEM : 0; | ||
694 | } | ||
695 | |||
696 | static int vgpu_gr_query_zbc(struct gk20a *g, struct gr_gk20a *gr, | ||
697 | struct zbc_query_params *query_params) | ||
698 | { | ||
699 | struct gk20a_platform *platform = gk20a_get_platform(g->dev); | ||
700 | struct tegra_vgpu_cmd_msg msg = {0}; | ||
701 | struct tegra_vgpu_zbc_query_table_params *p = | ||
702 | &msg.params.zbc_query_table; | ||
703 | int err; | ||
704 | |||
705 | gk20a_dbg_fn(""); | ||
706 | |||
707 | msg.cmd = TEGRA_VGPU_CMD_ZBC_QUERY_TABLE; | ||
708 | msg.handle = platform->virt_handle; | ||
709 | |||
710 | p->type = query_params->type; | ||
711 | p->index_size = query_params->index_size; | ||
712 | |||
713 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
714 | if (err || msg.ret) | ||
715 | return -ENOMEM; | ||
716 | |||
717 | switch (query_params->type) { | ||
718 | case GK20A_ZBC_TYPE_COLOR: | ||
719 | memcpy(query_params->color_ds, p->color_ds, | ||
720 | sizeof(query_params->color_ds)); | ||
721 | memcpy(query_params->color_l2, p->color_l2, | ||
722 | sizeof(query_params->color_l2)); | ||
723 | break; | ||
724 | case GK20A_ZBC_TYPE_DEPTH: | ||
725 | query_params->depth = p->depth; | ||
726 | break; | ||
727 | case GK20A_ZBC_TYPE_INVALID: | ||
728 | query_params->index_size = p->index_size; | ||
729 | break; | ||
730 | default: | ||
731 | return -EINVAL; | ||
732 | } | ||
733 | query_params->ref_cnt = p->ref_cnt; | ||
734 | query_params->format = p->format; | ||
735 | |||
736 | return 0; | ||
737 | } | ||
738 | |||
664 | static void vgpu_remove_gr_support(struct gr_gk20a *gr) | 739 | static void vgpu_remove_gr_support(struct gr_gk20a *gr) |
665 | { | 740 | { |
666 | gk20a_dbg_fn(""); | 741 | gk20a_dbg_fn(""); |
@@ -782,4 +857,6 @@ void vgpu_init_gr_ops(struct gpu_ops *gops) | |||
782 | gops->gr.get_gpc_tpc_mask = vgpu_gr_get_gpc_tpc_mask; | 857 | gops->gr.get_gpc_tpc_mask = vgpu_gr_get_gpc_tpc_mask; |
783 | gops->gr.get_max_fbps_count = vgpu_gr_get_max_fbps_count; | 858 | gops->gr.get_max_fbps_count = vgpu_gr_get_max_fbps_count; |
784 | gops->gr.get_fbp_en_mask = vgpu_gr_get_fbp_en_mask; | 859 | gops->gr.get_fbp_en_mask = vgpu_gr_get_fbp_en_mask; |
860 | gops->gr.zbc_set_table = vgpu_gr_add_zbc; | ||
861 | gops->gr.zbc_query_table = vgpu_gr_query_zbc; | ||
785 | } | 862 | } |