1 files changed, 24 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/gm20b/vgpu_gr_gm20b.c b/drivers/gpu/nvgpu/vgpu/gm20b/vgpu_gr_gm20b.c
index 07d41b2e..fb1f31d8 100644
--- a/drivers/gpu/nvgpu/vgpu/gm20b/vgpu_gr_gm20b.c
+++ b/drivers/gpu/nvgpu/vgpu/gm20b/vgpu_gr_gm20b.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -37,7 +37,30 @@ static void vgpu_gm20b_detect_sm_arch(struct gk20a *g)
                 gr_gpc0_tpc0_sm_arch_warp_count_v(v);
 }
 
+static int vgpu_gm20b_init_fs_state(struct gk20a *g)
+{
+        struct gr_gk20a *gr = &g->gr;
+        u32 tpc_index, gpc_index;
+        u32 sm_id = 0;
+
+        gk20a_dbg_fn("");
+
+        for (gpc_index = 0; gpc_index < gr->gpc_count; gpc_index++) {
+                for (tpc_index = 0; tpc_index < gr->gpc_tpc_count[gpc_index];
+                                                                tpc_index++) {
+                        g->gr.sm_to_cluster[sm_id].tpc_index = tpc_index;
+                        g->gr.sm_to_cluster[sm_id].gpc_index = gpc_index;
+
+                        sm_id++;
+                }
+        }
+
+        gr->no_of_sm = sm_id;
+        return 0;
+}
+
 void vgpu_gm20b_init_gr_ops(struct gpu_ops *gops)
 {
         gops->gr.detect_sm_arch = vgpu_gm20b_detect_sm_arch;
+        gops->gr.init_fs_state = vgpu_gm20b_init_fs_state;
 }