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path: root/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
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Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/fifo_vgpu.c')
-rw-r--r--drivers/gpu/nvgpu/vgpu/fifo_vgpu.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
index 6406c0da..c8a8ce49 100644
--- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
@@ -643,7 +643,8 @@ int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch,
643 nvgpu_list_for_each_entry(ch_tsg, &tsg->ch_list, 643 nvgpu_list_for_each_entry(ch_tsg, &tsg->ch_list,
644 channel_gk20a, ch_entry) { 644 channel_gk20a, ch_entry) {
645 if (gk20a_channel_get(ch_tsg)) { 645 if (gk20a_channel_get(ch_tsg)) {
646 nvgpu_set_error_notifier(ch_tsg, err_code); 646 g->ops.fifo.set_error_notifier(ch_tsg,
647 err_code);
647 ch_tsg->has_timedout = true; 648 ch_tsg->has_timedout = true;
648 gk20a_channel_put(ch_tsg); 649 gk20a_channel_put(ch_tsg);
649 } 650 }
@@ -651,7 +652,7 @@ int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch,
651 652
652 nvgpu_rwsem_up_read(&tsg->ch_list_lock); 653 nvgpu_rwsem_up_read(&tsg->ch_list_lock);
653 } else { 654 } else {
654 nvgpu_set_error_notifier(ch, err_code); 655 g->ops.fifo.set_error_notifier(ch, err_code);
655 ch->has_timedout = true; 656 ch->has_timedout = true;
656 } 657 }
657 658
@@ -726,10 +727,11 @@ int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info)
726 727
727 switch (info->type) { 728 switch (info->type) {
728 case TEGRA_VGPU_FIFO_INTR_PBDMA: 729 case TEGRA_VGPU_FIFO_INTR_PBDMA:
729 nvgpu_set_error_notifier(ch, NVGPU_ERR_NOTIFIER_PBDMA_ERROR); 730 g->ops.fifo.set_error_notifier(ch,
731 NVGPU_ERR_NOTIFIER_PBDMA_ERROR);
730 break; 732 break;
731 case TEGRA_VGPU_FIFO_INTR_CTXSW_TIMEOUT: 733 case TEGRA_VGPU_FIFO_INTR_CTXSW_TIMEOUT:
732 nvgpu_set_error_notifier(ch, 734 g->ops.fifo.set_error_notifier(ch,
733 NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT); 735 NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT);
734 break; 736 break;
735 case TEGRA_VGPU_FIFO_INTR_MMU_FAULT: 737 case TEGRA_VGPU_FIFO_INTR_MMU_FAULT: