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path: root/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
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Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/fifo_vgpu.c')
-rw-r--r--drivers/gpu/nvgpu/vgpu/fifo_vgpu.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
index 234f6fd4..4055d5af 100644
--- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
@@ -651,7 +651,7 @@ int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch,
651 if (gk20a_channel_get(ch_tsg)) { 651 if (gk20a_channel_get(ch_tsg)) {
652 g->ops.fifo.set_error_notifier(ch_tsg, 652 g->ops.fifo.set_error_notifier(ch_tsg,
653 err_code); 653 err_code);
654 ch_tsg->has_timedout = true; 654 gk20a_channel_set_timedout(ch_tsg);
655 gk20a_channel_put(ch_tsg); 655 gk20a_channel_put(ch_tsg);
656 } 656 }
657 } 657 }
@@ -659,7 +659,7 @@ int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch,
659 nvgpu_rwsem_up_read(&tsg->ch_list_lock); 659 nvgpu_rwsem_up_read(&tsg->ch_list_lock);
660 } else { 660 } else {
661 g->ops.fifo.set_error_notifier(ch, err_code); 661 g->ops.fifo.set_error_notifier(ch, err_code);
662 ch->has_timedout = true; 662 gk20a_channel_set_timedout(ch);
663 } 663 }
664 664
665 msg.cmd = TEGRA_VGPU_CMD_CHANNEL_FORCE_RESET; 665 msg.cmd = TEGRA_VGPU_CMD_CHANNEL_FORCE_RESET;
@@ -685,8 +685,8 @@ static void vgpu_fifo_set_ctx_mmu_error_ch(struct gk20a *g,
685 NVGPU_ERR_NOTIFIER_FIFO_ERROR_MMU_ERR_FLT); 685 NVGPU_ERR_NOTIFIER_FIFO_ERROR_MMU_ERR_FLT);
686 686
687 /* mark channel as faulted */ 687 /* mark channel as faulted */
688 ch->has_timedout = true; 688 gk20a_channel_set_timedout(ch);
689 nvgpu_smp_wmb(); 689
690 /* unblock pending waits */ 690 /* unblock pending waits */
691 nvgpu_cond_broadcast_interruptible(&ch->semaphore_wq); 691 nvgpu_cond_broadcast_interruptible(&ch->semaphore_wq);
692 nvgpu_cond_broadcast_interruptible(&ch->notifier_wq); 692 nvgpu_cond_broadcast_interruptible(&ch->notifier_wq);