diff options
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu/dbg_vgpu.c')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/dbg_vgpu.c | 216 |
1 files changed, 216 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c b/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c new file mode 100644 index 00000000..4879c2eb --- /dev/null +++ b/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c | |||
@@ -0,0 +1,216 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | |||
23 | #include <linux/tegra_gr_comm.h> | ||
24 | #include <linux/tegra_vgpu.h> | ||
25 | #include <uapi/linux/nvgpu.h> | ||
26 | |||
27 | #include "gk20a/gk20a.h" | ||
28 | #include "gk20a/channel_gk20a.h" | ||
29 | #include "gk20a/dbg_gpu_gk20a.h" | ||
30 | #include "vgpu.h" | ||
31 | #include "dbg_vgpu.h" | ||
32 | |||
33 | #include <nvgpu/bug.h> | ||
34 | |||
35 | int vgpu_exec_regops(struct dbg_session_gk20a *dbg_s, | ||
36 | struct nvgpu_dbg_gpu_reg_op *ops, | ||
37 | u64 num_ops) | ||
38 | { | ||
39 | struct channel_gk20a *ch; | ||
40 | struct tegra_vgpu_cmd_msg msg; | ||
41 | struct tegra_vgpu_reg_ops_params *p = &msg.params.reg_ops; | ||
42 | void *oob; | ||
43 | size_t oob_size, ops_size; | ||
44 | void *handle = NULL; | ||
45 | int err = 0; | ||
46 | |||
47 | gk20a_dbg_fn(""); | ||
48 | BUG_ON(sizeof(*ops) != sizeof(struct tegra_vgpu_reg_op)); | ||
49 | |||
50 | handle = tegra_gr_comm_oob_get_ptr(TEGRA_GR_COMM_CTX_CLIENT, | ||
51 | tegra_gr_comm_get_server_vmid(), | ||
52 | TEGRA_VGPU_QUEUE_CMD, | ||
53 | &oob, &oob_size); | ||
54 | if (!handle) | ||
55 | return -EINVAL; | ||
56 | |||
57 | ops_size = sizeof(*ops) * num_ops; | ||
58 | if (oob_size < ops_size) { | ||
59 | err = -ENOMEM; | ||
60 | goto fail; | ||
61 | } | ||
62 | |||
63 | memcpy(oob, ops, ops_size); | ||
64 | |||
65 | msg.cmd = TEGRA_VGPU_CMD_REG_OPS; | ||
66 | msg.handle = vgpu_get_handle(dbg_s->g); | ||
67 | ch = nvgpu_dbg_gpu_get_session_channel(dbg_s); | ||
68 | p->handle = ch ? ch->virt_ctx : 0; | ||
69 | p->num_ops = num_ops; | ||
70 | p->is_profiler = dbg_s->is_profiler; | ||
71 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
72 | err = err ? err : msg.ret; | ||
73 | if (!err) | ||
74 | memcpy(ops, oob, ops_size); | ||
75 | |||
76 | fail: | ||
77 | tegra_gr_comm_oob_put_ptr(handle); | ||
78 | return err; | ||
79 | } | ||
80 | |||
81 | int vgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s, bool disable_powergate) | ||
82 | { | ||
83 | struct tegra_vgpu_cmd_msg msg; | ||
84 | struct tegra_vgpu_set_powergate_params *p = &msg.params.set_powergate; | ||
85 | int err = 0; | ||
86 | u32 mode; | ||
87 | |||
88 | gk20a_dbg_fn(""); | ||
89 | |||
90 | /* Just return if requested mode is the same as the session's mode */ | ||
91 | if (disable_powergate) { | ||
92 | if (dbg_s->is_pg_disabled) | ||
93 | return 0; | ||
94 | dbg_s->is_pg_disabled = true; | ||
95 | mode = NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE; | ||
96 | } else { | ||
97 | if (!dbg_s->is_pg_disabled) | ||
98 | return 0; | ||
99 | dbg_s->is_pg_disabled = false; | ||
100 | mode = NVGPU_DBG_GPU_POWERGATE_MODE_ENABLE; | ||
101 | } | ||
102 | |||
103 | msg.cmd = TEGRA_VGPU_CMD_SET_POWERGATE; | ||
104 | msg.handle = vgpu_get_handle(dbg_s->g); | ||
105 | p->mode = mode; | ||
106 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
107 | err = err ? err : msg.ret; | ||
108 | return err; | ||
109 | } | ||
110 | |||
111 | static int vgpu_sendrecv_prof_cmd(struct dbg_session_gk20a *dbg_s, u32 mode) | ||
112 | { | ||
113 | struct tegra_vgpu_cmd_msg msg; | ||
114 | struct tegra_vgpu_prof_mgt_params *p = &msg.params.prof_management; | ||
115 | int err = 0; | ||
116 | |||
117 | msg.cmd = TEGRA_VGPU_CMD_PROF_MGT; | ||
118 | msg.handle = vgpu_get_handle(dbg_s->g); | ||
119 | |||
120 | p->mode = mode; | ||
121 | |||
122 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
123 | err = err ? err : msg.ret; | ||
124 | return err; | ||
125 | } | ||
126 | |||
127 | bool vgpu_check_and_set_global_reservation( | ||
128 | struct dbg_session_gk20a *dbg_s, | ||
129 | struct dbg_profiler_object_data *prof_obj) | ||
130 | { | ||
131 | struct gk20a *g = dbg_s->g; | ||
132 | |||
133 | if (g->profiler_reservation_count > 0) | ||
134 | return false; | ||
135 | |||
136 | /* Check that another guest OS doesn't already have a reservation */ | ||
137 | if (!vgpu_sendrecv_prof_cmd(dbg_s, TEGRA_VGPU_PROF_GET_GLOBAL)) { | ||
138 | g->global_profiler_reservation_held = true; | ||
139 | g->profiler_reservation_count = 1; | ||
140 | dbg_s->has_profiler_reservation = true; | ||
141 | prof_obj->has_reservation = true; | ||
142 | return true; | ||
143 | } | ||
144 | return false; | ||
145 | } | ||
146 | |||
147 | bool vgpu_check_and_set_context_reservation( | ||
148 | struct dbg_session_gk20a *dbg_s, | ||
149 | struct dbg_profiler_object_data *prof_obj) | ||
150 | { | ||
151 | struct gk20a *g = dbg_s->g; | ||
152 | |||
153 | /* Assumes that we've already checked that no global reservation | ||
154 | * is in effect for this guest. | ||
155 | * | ||
156 | * If our reservation count is non-zero, then no other guest has the | ||
157 | * global reservation; if it is zero, need to check with RM server. | ||
158 | * | ||
159 | */ | ||
160 | if ((g->profiler_reservation_count != 0) || | ||
161 | !vgpu_sendrecv_prof_cmd(dbg_s, TEGRA_VGPU_PROF_GET_CONTEXT)) { | ||
162 | g->profiler_reservation_count++; | ||
163 | dbg_s->has_profiler_reservation = true; | ||
164 | prof_obj->has_reservation = true; | ||
165 | return true; | ||
166 | } | ||
167 | return false; | ||
168 | } | ||
169 | |||
170 | void vgpu_release_profiler_reservation( | ||
171 | struct dbg_session_gk20a *dbg_s, | ||
172 | struct dbg_profiler_object_data *prof_obj) | ||
173 | { | ||
174 | struct gk20a *g = dbg_s->g; | ||
175 | |||
176 | dbg_s->has_profiler_reservation = false; | ||
177 | prof_obj->has_reservation = false; | ||
178 | if (prof_obj->ch == NULL) | ||
179 | g->global_profiler_reservation_held = false; | ||
180 | |||
181 | /* If new reservation count is zero, notify server */ | ||
182 | g->profiler_reservation_count--; | ||
183 | if (g->profiler_reservation_count == 0) | ||
184 | vgpu_sendrecv_prof_cmd(dbg_s, TEGRA_VGPU_PROF_RELEASE); | ||
185 | } | ||
186 | |||
187 | static int vgpu_sendrecv_perfbuf_cmd(struct gk20a *g, u64 offset, u32 size) | ||
188 | { | ||
189 | struct mm_gk20a *mm = &g->mm; | ||
190 | struct vm_gk20a *vm = mm->perfbuf.vm; | ||
191 | struct tegra_vgpu_cmd_msg msg; | ||
192 | struct tegra_vgpu_perfbuf_mgt_params *p = | ||
193 | &msg.params.perfbuf_management; | ||
194 | int err; | ||
195 | |||
196 | msg.cmd = TEGRA_VGPU_CMD_PERFBUF_MGT; | ||
197 | msg.handle = vgpu_get_handle(g); | ||
198 | |||
199 | p->vm_handle = vm->handle; | ||
200 | p->offset = offset; | ||
201 | p->size = size; | ||
202 | |||
203 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
204 | err = err ? err : msg.ret; | ||
205 | return err; | ||
206 | } | ||
207 | |||
208 | int vgpu_perfbuffer_enable(struct gk20a *g, u64 offset, u32 size) | ||
209 | { | ||
210 | return vgpu_sendrecv_perfbuf_cmd(g, offset, size); | ||
211 | } | ||
212 | |||
213 | int vgpu_perfbuffer_disable(struct gk20a *g) | ||
214 | { | ||
215 | return vgpu_sendrecv_perfbuf_cmd(g, 0, 0); | ||
216 | } | ||