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path: root/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c
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Diffstat (limited to 'drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c')
-rw-r--r--drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c23
1 files changed, 12 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c
index 5b2958ec..4f8faf5a 100644
--- a/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c
+++ b/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c
@@ -166,12 +166,12 @@ int gk20a_tegra_secure_alloc(struct device *dev,
166 166
167 sgt = nvgpu_kzalloc(platform->g, sizeof(*sgt)); 167 sgt = nvgpu_kzalloc(platform->g, sizeof(*sgt));
168 if (!sgt) { 168 if (!sgt) {
169 gk20a_err(dev, "failed to allocate memory\n"); 169 nvgpu_err(platform->g, "failed to allocate memory");
170 goto fail; 170 goto fail;
171 } 171 }
172 err = sg_alloc_table(sgt, 1, GFP_KERNEL); 172 err = sg_alloc_table(sgt, 1, GFP_KERNEL);
173 if (err) { 173 if (err) {
174 gk20a_err(dev, "failed to allocate sg_table\n"); 174 nvgpu_err(platform->g, "failed to allocate sg_table");
175 goto fail_sgt; 175 goto fail_sgt;
176 } 176 }
177 page = phys_to_page(iova); 177 page = phys_to_page(iova);
@@ -427,7 +427,7 @@ static int gk20a_tegra_railgate(struct device *dev)
427 return 0; 427 return 0;
428 428
429err_power_off: 429err_power_off:
430 gk20a_err(dev, "Could not railgate GPU"); 430 nvgpu_err(get_gk20a(dev), "Could not railgate GPU");
431 return ret; 431 return ret;
432} 432}
433 433
@@ -463,12 +463,12 @@ static int gk20a_tegra_unrailgate(struct device *dev)
463 if (!first) { 463 if (!first) {
464 ret = clk_enable(platform->clk[0]); 464 ret = clk_enable(platform->clk[0]);
465 if (ret) { 465 if (ret) {
466 gk20a_err(dev, "could not turn on gpu pll"); 466 nvgpu_err(platform->g, "could not turn on gpu pll");
467 goto err_clk_on; 467 goto err_clk_on;
468 } 468 }
469 ret = clk_enable(platform->clk[1]); 469 ret = clk_enable(platform->clk[1]);
470 if (ret) { 470 if (ret) {
471 gk20a_err(dev, "could not turn on pwr clock"); 471 nvgpu_err(platform->g, "could not turn on pwr clock");
472 goto err_clk_on; 472 goto err_clk_on;
473 } 473 }
474 } 474 }
@@ -581,7 +581,7 @@ static int gm20b_tegra_railgate(struct device *dev)
581 return 0; 581 return 0;
582 582
583err_power_off: 583err_power_off:
584 gk20a_err(dev, "Could not railgate GPU"); 584 nvgpu_err(platform->g, "Could not railgate GPU");
585 return ret; 585 return ret;
586} 586}
587 587
@@ -595,6 +595,7 @@ err_power_off:
595static int gm20b_tegra_unrailgate(struct device *dev) 595static int gm20b_tegra_unrailgate(struct device *dev)
596{ 596{
597 struct gk20a_platform *platform = dev_get_drvdata(dev); 597 struct gk20a_platform *platform = dev_get_drvdata(dev);
598 struct gk20a *g = platform->g;
598 int ret = 0; 599 int ret = 0;
599 bool first = false; 600 bool first = false;
600 601
@@ -625,7 +626,7 @@ static int gm20b_tegra_unrailgate(struct device *dev)
625 if (!platform->clk_reset) { 626 if (!platform->clk_reset) {
626 platform->clk_reset = clk_get(dev, "gpu_gate"); 627 platform->clk_reset = clk_get(dev, "gpu_gate");
627 if (IS_ERR(platform->clk_reset)) { 628 if (IS_ERR(platform->clk_reset)) {
628 gk20a_err(dev, "fail to get gpu reset clk\n"); 629 nvgpu_err(g, "fail to get gpu reset clk");
629 goto err_clk_on; 630 goto err_clk_on;
630 } 631 }
631 } 632 }
@@ -633,25 +634,25 @@ static int gm20b_tegra_unrailgate(struct device *dev)
633 if (!first) { 634 if (!first) {
634 ret = clk_prepare_enable(platform->clk_reset); 635 ret = clk_prepare_enable(platform->clk_reset);
635 if (ret) { 636 if (ret) {
636 gk20a_err(dev, "could not turn on gpu_gate"); 637 nvgpu_err(g, "could not turn on gpu_gate");
637 goto err_clk_on; 638 goto err_clk_on;
638 } 639 }
639 640
640 ret = clk_prepare_enable(platform->clk[0]); 641 ret = clk_prepare_enable(platform->clk[0]);
641 if (ret) { 642 if (ret) {
642 gk20a_err(dev, "could not turn on gpu pll"); 643 nvgpu_err(g, "could not turn on gpu pll");
643 goto err_clk_on; 644 goto err_clk_on;
644 } 645 }
645 ret = clk_prepare_enable(platform->clk[1]); 646 ret = clk_prepare_enable(platform->clk[1]);
646 if (ret) { 647 if (ret) {
647 gk20a_err(dev, "could not turn on pwr clock"); 648 nvgpu_err(g, "could not turn on pwr clock");
648 goto err_clk_on; 649 goto err_clk_on;
649 } 650 }
650 651
651 if (platform->clk[3]) { 652 if (platform->clk[3]) {
652 ret = clk_prepare_enable(platform->clk[3]); 653 ret = clk_prepare_enable(platform->clk[3]);
653 if (ret) { 654 if (ret) {
654 gk20a_err(dev, "could not turn on fuse clock"); 655 nvgpu_err(g, "could not turn on fuse clock");
655 goto err_clk_on; 656 goto err_clk_on;
656 } 657 }
657 } 658 }