summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/pstate
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/pstate')
-rw-r--r--drivers/gpu/nvgpu/pstate/pstate.c9
-rw-r--r--drivers/gpu/nvgpu/pstate/pstate.h4
2 files changed, 12 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/pstate/pstate.c b/drivers/gpu/nvgpu/pstate/pstate.c
index 2e08ef01..82e809bb 100644
--- a/drivers/gpu/nvgpu/pstate/pstate.c
+++ b/drivers/gpu/nvgpu/pstate/pstate.c
@@ -83,6 +83,10 @@ int gk20a_init_pstate_support(struct gk20a *g)
83 return err; 83 return err;
84 84
85 err = clk_freq_controller_sw_setup(g); 85 err = clk_freq_controller_sw_setup(g);
86 if (err)
87 return err;
88
89 err = nvgpu_lpwr_pg_setup(g);
86 90
87 return err; 91 return err;
88} 92}
@@ -327,6 +331,9 @@ static int pstate_sw_setup(struct gk20a *g)
327 331
328 gk20a_dbg_fn(""); 332 gk20a_dbg_fn("");
329 333
334 init_waitqueue_head(&g->perf_pmu.pstatesobjs.pstate_notifier_wq);
335 mutex_init(&g->perf_pmu.pstatesobjs.pstate_mutex);
336
330 err = boardobjgrpconstruct_e32(&g->perf_pmu.pstatesobjs.super); 337 err = boardobjgrpconstruct_e32(&g->perf_pmu.pstatesobjs.super);
331 if (err) { 338 if (err) {
332 gk20a_err(dev_from_gk20a(g), 339 gk20a_err(dev_from_gk20a(g),
@@ -361,7 +368,7 @@ done:
361 return err; 368 return err;
362} 369}
363 370
364static struct pstate *pstate_find(struct gk20a *g, u32 num) 371struct pstate *pstate_find(struct gk20a *g, u32 num)
365{ 372{
366 struct pstates *pstates = &(g->perf_pmu.pstatesobjs); 373 struct pstates *pstates = &(g->perf_pmu.pstatesobjs);
367 struct pstate *pstate; 374 struct pstate *pstate;
diff --git a/drivers/gpu/nvgpu/pstate/pstate.h b/drivers/gpu/nvgpu/pstate/pstate.h
index b6519c20..af0956e8 100644
--- a/drivers/gpu/nvgpu/pstate/pstate.h
+++ b/drivers/gpu/nvgpu/pstate/pstate.h
@@ -48,6 +48,9 @@ struct pstate {
48struct pstates { 48struct pstates {
49 struct boardobjgrp_e32 super; 49 struct boardobjgrp_e32 super;
50 u32 num_levels; 50 u32 num_levels;
51 wait_queue_head_t pstate_notifier_wq;
52 u32 is_pstate_switch_on;
53 struct mutex pstate_mutex; /* protect is_pstate_switch_on */
51}; 54};
52 55
53int gk20a_init_pstate_support(struct gk20a *g); 56int gk20a_init_pstate_support(struct gk20a *g);
@@ -55,5 +58,6 @@ int gk20a_init_pstate_pmu_support(struct gk20a *g);
55 58
56struct clk_set_info *pstate_get_clk_set_info(struct gk20a *g, u32 pstate_num, 59struct clk_set_info *pstate_get_clk_set_info(struct gk20a *g, u32 pstate_num,
57 enum nv_pmu_clk_clkwhich clkwhich); 60 enum nv_pmu_clk_clkwhich clkwhich);
61struct pstate *pstate_find(struct gk20a *g, u32 num);
58 62
59#endif /* __PSTATE_H__ */ 63#endif /* __PSTATE_H__ */