diff options
Diffstat (limited to 'drivers/gpu/nvgpu/pstate/pstate.h')
-rw-r--r-- | drivers/gpu/nvgpu/pstate/pstate.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/pstate/pstate.h b/drivers/gpu/nvgpu/pstate/pstate.h new file mode 100644 index 00000000..af0956e8 --- /dev/null +++ b/drivers/gpu/nvgpu/pstate/pstate.h | |||
@@ -0,0 +1,63 @@ | |||
1 | /* | ||
2 | * general p state infrastructure | ||
3 | * | ||
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | */ | ||
15 | #ifndef __PSTATE_H__ | ||
16 | #define __PSTATE_H__ | ||
17 | |||
18 | #include "gk20a/gk20a.h" | ||
19 | #include "clk/clk.h" | ||
20 | |||
21 | #define CTRL_PERF_PSTATE_TYPE_3X 0x3 | ||
22 | |||
23 | #define CTRL_PERF_PSTATE_P0 0 | ||
24 | #define CTRL_PERF_PSTATE_P5 5 | ||
25 | #define CTRL_PERF_PSTATE_P8 8 | ||
26 | |||
27 | #define CLK_SET_INFO_MAX_SIZE (32) | ||
28 | |||
29 | struct clk_set_info { | ||
30 | enum nv_pmu_clk_clkwhich clkwhich; | ||
31 | u32 nominal_mhz; | ||
32 | u32 min_mhz; | ||
33 | u32 max_mhz; | ||
34 | }; | ||
35 | |||
36 | struct clk_set_info_list { | ||
37 | u32 num_info; | ||
38 | struct clk_set_info clksetinfo[CLK_SET_INFO_MAX_SIZE]; | ||
39 | }; | ||
40 | |||
41 | struct pstate { | ||
42 | struct boardobj super; | ||
43 | u32 num; | ||
44 | u8 lpwr_entry_idx; | ||
45 | struct clk_set_info_list clklist; | ||
46 | }; | ||
47 | |||
48 | struct pstates { | ||
49 | struct boardobjgrp_e32 super; | ||
50 | u32 num_levels; | ||
51 | wait_queue_head_t pstate_notifier_wq; | ||
52 | u32 is_pstate_switch_on; | ||
53 | struct mutex pstate_mutex; /* protect is_pstate_switch_on */ | ||
54 | }; | ||
55 | |||
56 | int gk20a_init_pstate_support(struct gk20a *g); | ||
57 | int gk20a_init_pstate_pmu_support(struct gk20a *g); | ||
58 | |||
59 | struct clk_set_info *pstate_get_clk_set_info(struct gk20a *g, u32 pstate_num, | ||
60 | enum nv_pmu_clk_clkwhich clkwhich); | ||
61 | struct pstate *pstate_find(struct gk20a *g, u32 num); | ||
62 | |||
63 | #endif /* __PSTATE_H__ */ | ||