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Diffstat (limited to 'drivers/gpu/nvgpu/pmuif/gpmuif_perfmon.h')
-rw-r--r--drivers/gpu/nvgpu/pmuif/gpmuif_perfmon.h178
1 files changed, 178 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/pmuif/gpmuif_perfmon.h b/drivers/gpu/nvgpu/pmuif/gpmuif_perfmon.h
new file mode 100644
index 00000000..098d0305
--- /dev/null
+++ b/drivers/gpu/nvgpu/pmuif/gpmuif_perfmon.h
@@ -0,0 +1,178 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13#ifndef _GPMUIFPERFMON_H_
14#define _GPMUIFPERFMON_H_
15
16/*perfmon task defines*/
17
18#define PMU_DOMAIN_GROUP_PSTATE 0
19#define PMU_DOMAIN_GROUP_GPC2CLK 1
20#define PMU_DOMAIN_GROUP_NUM 2
21
22#define PMU_PERFMON_FLAG_ENABLE_INCREASE (0x00000001)
23#define PMU_PERFMON_FLAG_ENABLE_DECREASE (0x00000002)
24#define PMU_PERFMON_FLAG_CLEAR_PREV (0x00000004)
25
26enum pmu_perfmon_cmd_start_fields {
27 COUNTER_ALLOC
28};
29
30enum {
31 PMU_PERFMON_CMD_ID_START = 0,
32 PMU_PERFMON_CMD_ID_STOP = 1,
33 PMU_PERFMON_CMD_ID_INIT = 2
34};
35
36struct pmu_perfmon_counter_v0 {
37 u8 index;
38 u8 flags;
39 u8 group_id;
40 u8 valid;
41 u16 upper_threshold; /* units of 0.01% */
42 u16 lower_threshold; /* units of 0.01% */
43};
44
45struct pmu_perfmon_counter_v2 {
46 u8 index;
47 u8 flags;
48 u8 group_id;
49 u8 valid;
50 u16 upper_threshold; /* units of 0.01% */
51 u16 lower_threshold; /* units of 0.01% */
52 u32 scale;
53};
54
55struct pmu_perfmon_cmd_start_v3 {
56 u8 cmd_type;
57 u8 group_id;
58 u8 state_id;
59 u8 flags;
60 struct pmu_allocation_v3 counter_alloc;
61};
62
63struct pmu_perfmon_cmd_start_v2 {
64 u8 cmd_type;
65 u8 group_id;
66 u8 state_id;
67 u8 flags;
68 struct pmu_allocation_v2 counter_alloc;
69};
70
71struct pmu_perfmon_cmd_start_v1 {
72 u8 cmd_type;
73 u8 group_id;
74 u8 state_id;
75 u8 flags;
76 struct pmu_allocation_v1 counter_alloc;
77};
78
79struct pmu_perfmon_cmd_start_v0 {
80 u8 cmd_type;
81 u8 group_id;
82 u8 state_id;
83 u8 flags;
84 struct pmu_allocation_v0 counter_alloc;
85};
86
87struct pmu_perfmon_cmd_stop {
88 u8 cmd_type;
89};
90
91struct pmu_perfmon_cmd_init_v3 {
92 u8 cmd_type;
93 u8 to_decrease_count;
94 u8 base_counter_id;
95 u32 sample_period_us;
96 struct pmu_allocation_v3 counter_alloc;
97 u8 num_counters;
98 u8 samples_in_moving_avg;
99 u16 sample_buffer;
100};
101
102struct pmu_perfmon_cmd_init_v2 {
103 u8 cmd_type;
104 u8 to_decrease_count;
105 u8 base_counter_id;
106 u32 sample_period_us;
107 struct pmu_allocation_v2 counter_alloc;
108 u8 num_counters;
109 u8 samples_in_moving_avg;
110 u16 sample_buffer;
111};
112
113struct pmu_perfmon_cmd_init_v1 {
114 u8 cmd_type;
115 u8 to_decrease_count;
116 u8 base_counter_id;
117 u32 sample_period_us;
118 struct pmu_allocation_v1 counter_alloc;
119 u8 num_counters;
120 u8 samples_in_moving_avg;
121 u16 sample_buffer;
122};
123
124struct pmu_perfmon_cmd_init_v0 {
125 u8 cmd_type;
126 u8 to_decrease_count;
127 u8 base_counter_id;
128 u32 sample_period_us;
129 struct pmu_allocation_v0 counter_alloc;
130 u8 num_counters;
131 u8 samples_in_moving_avg;
132 u16 sample_buffer;
133};
134
135struct pmu_perfmon_cmd {
136 union {
137 u8 cmd_type;
138 struct pmu_perfmon_cmd_start_v0 start_v0;
139 struct pmu_perfmon_cmd_start_v1 start_v1;
140 struct pmu_perfmon_cmd_start_v2 start_v2;
141 struct pmu_perfmon_cmd_start_v3 start_v3;
142 struct pmu_perfmon_cmd_stop stop;
143 struct pmu_perfmon_cmd_init_v0 init_v0;
144 struct pmu_perfmon_cmd_init_v1 init_v1;
145 struct pmu_perfmon_cmd_init_v2 init_v2;
146 struct pmu_perfmon_cmd_init_v3 init_v3;
147 };
148};
149
150struct pmu_zbc_cmd {
151 u8 cmd_type;
152 u8 pad;
153 u16 entry_mask;
154};
155
156/* PERFMON MSG */
157enum {
158 PMU_PERFMON_MSG_ID_INCREASE_EVENT = 0,
159 PMU_PERFMON_MSG_ID_DECREASE_EVENT = 1,
160 PMU_PERFMON_MSG_ID_INIT_EVENT = 2,
161 PMU_PERFMON_MSG_ID_ACK = 3
162};
163
164struct pmu_perfmon_msg_generic {
165 u8 msg_type;
166 u8 state_id;
167 u8 group_id;
168 u8 data;
169};
170
171struct pmu_perfmon_msg {
172 union {
173 u8 msg_type;
174 struct pmu_perfmon_msg_generic gen;
175 };
176};
177
178#endif /* _GPMUIFPERFMON_H_ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-17 09:51:53 -0400