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Diffstat (limited to 'drivers/gpu/nvgpu/pmuif/gpmuif_ap.h')
-rw-r--r--drivers/gpu/nvgpu/pmuif/gpmuif_ap.h247
1 files changed, 247 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/pmuif/gpmuif_ap.h b/drivers/gpu/nvgpu/pmuif/gpmuif_ap.h
new file mode 100644
index 00000000..7e2f546c
--- /dev/null
+++ b/drivers/gpu/nvgpu/pmuif/gpmuif_ap.h
@@ -0,0 +1,247 @@
1/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13#ifndef _GPMUIFAP_H_
14#define _GPMUIFAP_H_
15
16/* PMU Command/Message Interfaces for Adaptive Power */
17/* Macro to get Histogram index */
18#define PMU_AP_HISTOGRAM(idx) (idx)
19#define PMU_AP_HISTOGRAM_CONT (4)
20
21/* Total number of histogram bins */
22#define PMU_AP_CFG_HISTOGRAM_BIN_N (16)
23
24/* Mapping between Idle counters and histograms */
25#define PMU_AP_IDLE_MASK_HIST_IDX_0 (2)
26#define PMU_AP_IDLE_MASK_HIST_IDX_1 (3)
27#define PMU_AP_IDLE_MASK_HIST_IDX_2 (5)
28#define PMU_AP_IDLE_MASK_HIST_IDX_3 (6)
29
30
31/* Mapping between AP_CTRLs and Histograms */
32#define PMU_AP_HISTOGRAM_IDX_GRAPHICS (PMU_AP_HISTOGRAM(1))
33
34/* Mapping between AP_CTRLs and Idle counters */
35#define PMU_AP_IDLE_MASK_GRAPHICS (PMU_AP_IDLE_MASK_HIST_IDX_1)
36
37/* Adaptive Power Controls (AP_CTRL) */
38enum {
39 PMU_AP_CTRL_ID_GRAPHICS = 0x0,
40 PMU_AP_CTRL_ID_MAX,
41};
42
43/* AP_CTRL Statistics */
44struct pmu_ap_ctrl_stat {
45 /*
46 * Represents whether AP is active or not
47 */
48 u8 b_active;
49
50 /* Idle filter represented by histogram bin index */
51 u8 idle_filter_x;
52 u8 rsvd[2];
53
54 /* Total predicted power saving cycles. */
55 s32 power_saving_h_cycles;
56
57 /* Counts how many times AP gave us -ve power benefits. */
58 u32 bad_decision_count;
59
60 /*
61 * Number of times ap structure needs to skip AP iterations
62 * KICK_CTRL from kernel updates this parameter.
63 */
64 u32 skip_count;
65 u8 bin[PMU_AP_CFG_HISTOGRAM_BIN_N];
66};
67
68/* Parameters initialized by INITn APCTRL command */
69struct pmu_ap_ctrl_init_params {
70 /* Minimum idle filter value in Us */
71 u32 min_idle_filter_us;
72
73 /*
74 * Minimum Targeted Saving in Us. AP will update idle thresholds only
75 * if power saving achieved by updating idle thresholds is greater than
76 * Minimum targeted saving.
77 */
78 u32 min_target_saving_us;
79
80 /* Minimum targeted residency of power feature in Us */
81 u32 power_break_even_us;
82
83 /*
84 * Maximum number of allowed power feature cycles per sample.
85 *
86 * We are allowing at max "pgPerSampleMax" cycles in one iteration of AP
87 * AKA pgPerSampleMax in original algorithm.
88 */
89 u32 cycles_per_sample_max;
90};
91
92/* AP Commands/Message structures */
93
94/*
95 * Structure for Generic AP Commands
96 */
97struct pmu_ap_cmd_common {
98 u8 cmd_type;
99 u16 cmd_id;
100};
101
102/*
103 * Structure for INIT AP command
104 */
105struct pmu_ap_cmd_init {
106 u8 cmd_type;
107 u16 cmd_id;
108 u8 rsvd;
109 u32 pg_sampling_period_us;
110};
111
112/*
113 * Structure for Enable/Disable ApCtrl Commands
114 */
115struct pmu_ap_cmd_enable_ctrl {
116 u8 cmd_type;
117 u16 cmd_id;
118
119 u8 ctrl_id;
120};
121
122struct pmu_ap_cmd_disable_ctrl {
123 u8 cmd_type;
124 u16 cmd_id;
125
126 u8 ctrl_id;
127};
128
129/*
130 * Structure for INIT command
131 */
132struct pmu_ap_cmd_init_ctrl {
133 u8 cmd_type;
134 u16 cmd_id;
135 u8 ctrl_id;
136 struct pmu_ap_ctrl_init_params params;
137};
138
139struct pmu_ap_cmd_init_and_enable_ctrl {
140 u8 cmd_type;
141 u16 cmd_id;
142 u8 ctrl_id;
143 struct pmu_ap_ctrl_init_params params;
144};
145
146/*
147 * Structure for KICK_CTRL command
148 */
149struct pmu_ap_cmd_kick_ctrl {
150 u8 cmd_type;
151 u16 cmd_id;
152 u8 ctrl_id;
153
154 u32 skip_count;
155};
156
157/*
158 * Structure for PARAM command
159 */
160struct pmu_ap_cmd_param {
161 u8 cmd_type;
162 u16 cmd_id;
163 u8 ctrl_id;
164
165 u32 data;
166};
167
168/*
169 * Defines for AP commands
170 */
171enum {
172 PMU_AP_CMD_ID_INIT = 0x0,
173 PMU_AP_CMD_ID_INIT_AND_ENABLE_CTRL,
174 PMU_AP_CMD_ID_ENABLE_CTRL,
175 PMU_AP_CMD_ID_DISABLE_CTRL,
176 PMU_AP_CMD_ID_KICK_CTRL,
177};
178
179/*
180 * AP Command
181 */
182union pmu_ap_cmd {
183 u8 cmd_type;
184 struct pmu_ap_cmd_common cmn;
185 struct pmu_ap_cmd_init init;
186 struct pmu_ap_cmd_init_and_enable_ctrl init_and_enable_ctrl;
187 struct pmu_ap_cmd_enable_ctrl enable_ctrl;
188 struct pmu_ap_cmd_disable_ctrl disable_ctrl;
189 struct pmu_ap_cmd_kick_ctrl kick_ctrl;
190};
191
192/*
193 * Structure for generic AP Message
194 */
195struct pmu_ap_msg_common {
196 u8 msg_type;
197 u16 msg_id;
198};
199
200/*
201 * Structure for INIT_ACK Message
202 */
203struct pmu_ap_msg_init_ack {
204 u8 msg_type;
205 u16 msg_id;
206 u8 ctrl_id;
207 u32 stats_dmem_offset;
208};
209
210/*
211 * Defines for AP messages
212 */
213enum {
214 PMU_AP_MSG_ID_INIT_ACK = 0x0,
215};
216
217/*
218 * AP Message
219 */
220union pmu_ap_msg {
221 u8 msg_type;
222 struct pmu_ap_msg_common cmn;
223 struct pmu_ap_msg_init_ack init_ack;
224};
225
226/*
227 * Adaptive Power Controller
228 */
229struct ap_ctrl {
230 u32 stats_dmem_offset;
231 u32 disable_reason_mask;
232 struct pmu_ap_ctrl_stat stat_cache;
233 u8 b_ready;
234};
235
236/*
237 * Adaptive Power structure
238 *
239 * ap structure provides generic infrastructure to make any power feature
240 * adaptive.
241 */
242struct pmu_ap {
243 u32 supported_mask;
244 struct ap_ctrl ap_ctrl[PMU_AP_CTRL_ID_MAX];
245};
246
247#endif /* _GPMUIFAP_H_*/
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-07 23:40:53 -0400