diff options
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr')
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pmgr.c | 9 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pmgrpmu.c | 18 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pwrdev.c | 12 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pwrmonitor.c | 18 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pwrpolicy.c | 9 |
5 files changed, 44 insertions, 22 deletions
diff --git a/drivers/gpu/nvgpu/pmgr/pmgr.c b/drivers/gpu/nvgpu/pmgr/pmgr.c index 6be0f82f..227a9893 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgr.c +++ b/drivers/gpu/nvgpu/pmgr/pmgr.c | |||
@@ -30,9 +30,10 @@ int pmgr_pwr_devices_get_power(struct gk20a *g, u32 *val) | |||
30 | int status; | 30 | int status; |
31 | 31 | ||
32 | status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload); | 32 | status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload); |
33 | if (status) | 33 | if (status) { |
34 | nvgpu_err(g, "pmgr_pwr_devices_get_current_power failed %x", | 34 | nvgpu_err(g, "pmgr_pwr_devices_get_current_power failed %x", |
35 | status); | 35 | status); |
36 | } | ||
36 | 37 | ||
37 | *val = payload.devices[0].powerm_w; | 38 | *val = payload.devices[0].powerm_w; |
38 | 39 | ||
@@ -45,9 +46,10 @@ int pmgr_pwr_devices_get_current(struct gk20a *g, u32 *val) | |||
45 | int status; | 46 | int status; |
46 | 47 | ||
47 | status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload); | 48 | status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload); |
48 | if (status) | 49 | if (status) { |
49 | nvgpu_err(g, "pmgr_pwr_devices_get_current failed %x", | 50 | nvgpu_err(g, "pmgr_pwr_devices_get_current failed %x", |
50 | status); | 51 | status); |
52 | } | ||
51 | 53 | ||
52 | *val = payload.devices[0].currentm_a; | 54 | *val = payload.devices[0].currentm_a; |
53 | 55 | ||
@@ -60,9 +62,10 @@ int pmgr_pwr_devices_get_voltage(struct gk20a *g, u32 *val) | |||
60 | int status; | 62 | int status; |
61 | 63 | ||
62 | status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload); | 64 | status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload); |
63 | if (status) | 65 | if (status) { |
64 | nvgpu_err(g, "pmgr_pwr_devices_get_current_voltage failed %x", | 66 | nvgpu_err(g, "pmgr_pwr_devices_get_current_voltage failed %x", |
65 | status); | 67 | status); |
68 | } | ||
66 | 69 | ||
67 | *val = payload.devices[0].voltageu_v; | 70 | *val = payload.devices[0].voltageu_v; |
68 | 71 | ||
diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c index 69c43a01..d0c0e763 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c +++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c | |||
@@ -168,9 +168,10 @@ static u32 pmgr_send_i2c_device_topology_to_pmu(struct gk20a *g) | |||
168 | PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED, | 168 | PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED, |
169 | &i2c_desc_table); | 169 | &i2c_desc_table); |
170 | 170 | ||
171 | if (status) | 171 | if (status) { |
172 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", | 172 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", |
173 | status); | 173 | status); |
174 | } | ||
174 | 175 | ||
175 | return status; | 176 | return status; |
176 | } | 177 | } |
@@ -183,8 +184,9 @@ static int pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g) | |||
183 | 184 | ||
184 | /* Set the BA-device-independent HW information */ | 185 | /* Set the BA-device-independent HW information */ |
185 | pwr_desc_table = nvgpu_kzalloc(g, sizeof(*pwr_desc_table)); | 186 | pwr_desc_table = nvgpu_kzalloc(g, sizeof(*pwr_desc_table)); |
186 | if (!pwr_desc_table) | 187 | if (!pwr_desc_table) { |
187 | return -ENOMEM; | 188 | return -ENOMEM; |
189 | } | ||
188 | 190 | ||
189 | ppwr_desc_header = &(pwr_desc_table->hdr.data); | 191 | ppwr_desc_header = &(pwr_desc_table->hdr.data); |
190 | ppwr_desc_header->ba_info.b_initialized_and_used = false; | 192 | ppwr_desc_header->ba_info.b_initialized_and_used = false; |
@@ -212,9 +214,10 @@ static int pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g) | |||
212 | (u16)sizeof(struct nv_pmu_pmgr_pwr_device_desc_table), | 214 | (u16)sizeof(struct nv_pmu_pmgr_pwr_device_desc_table), |
213 | pwr_desc_table); | 215 | pwr_desc_table); |
214 | 216 | ||
215 | if (status) | 217 | if (status) { |
216 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", | 218 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", |
217 | status); | 219 | status); |
220 | } | ||
218 | 221 | ||
219 | exit: | 222 | exit: |
220 | nvgpu_kfree(g, pwr_desc_table); | 223 | nvgpu_kfree(g, pwr_desc_table); |
@@ -230,8 +233,9 @@ static int pmgr_send_pwr_mointer_to_pmu(struct gk20a *g) | |||
230 | int status = 0; | 233 | int status = 0; |
231 | 234 | ||
232 | pwr_monitor_pack = nvgpu_kzalloc(g, sizeof(*pwr_monitor_pack)); | 235 | pwr_monitor_pack = nvgpu_kzalloc(g, sizeof(*pwr_monitor_pack)); |
233 | if (!pwr_monitor_pack) | 236 | if (!pwr_monitor_pack) { |
234 | return -ENOMEM; | 237 | return -ENOMEM; |
238 | } | ||
235 | 239 | ||
236 | /* Copy all the global settings from the RM copy */ | 240 | /* Copy all the global settings from the RM copy */ |
237 | pwr_channel_hdr = &(pwr_monitor_pack->channels.hdr.data); | 241 | pwr_channel_hdr = &(pwr_monitor_pack->channels.hdr.data); |
@@ -281,9 +285,10 @@ static int pmgr_send_pwr_mointer_to_pmu(struct gk20a *g) | |||
281 | (u16)sizeof(struct nv_pmu_pmgr_pwr_monitor_pack), | 285 | (u16)sizeof(struct nv_pmu_pmgr_pwr_monitor_pack), |
282 | pwr_monitor_pack); | 286 | pwr_monitor_pack); |
283 | 287 | ||
284 | if (status) | 288 | if (status) { |
285 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", | 289 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", |
286 | status); | 290 | status); |
291 | } | ||
287 | 292 | ||
288 | exit: | 293 | exit: |
289 | nvgpu_kfree(g, pwr_monitor_pack); | 294 | nvgpu_kfree(g, pwr_monitor_pack); |
@@ -365,9 +370,10 @@ static int pmgr_send_pwr_policy_to_pmu(struct gk20a *g) | |||
365 | (u16)sizeof(struct nv_pmu_pmgr_pwr_policy_pack), | 370 | (u16)sizeof(struct nv_pmu_pmgr_pwr_policy_pack), |
366 | ppwrpack); | 371 | ppwrpack); |
367 | 372 | ||
368 | if (status) | 373 | if (status) { |
369 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", | 374 | nvgpu_err(g, "pmgr_pmu_set_object failed %x", |
370 | status); | 375 | status); |
376 | } | ||
371 | 377 | ||
372 | exit: | 378 | exit: |
373 | if (ppwrpack) { | 379 | if (ppwrpack) { |
diff --git a/drivers/gpu/nvgpu/pmgr/pwrdev.c b/drivers/gpu/nvgpu/pmgr/pwrdev.c index 235629d6..90d39610 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrdev.c +++ b/drivers/gpu/nvgpu/pmgr/pwrdev.c | |||
@@ -40,8 +40,9 @@ static int _pwr_device_pmudata_instget(struct gk20a *g, | |||
40 | 40 | ||
41 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ | 41 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ |
42 | if (((u32)BIT(idx) & | 42 | if (((u32)BIT(idx) & |
43 | ppmgrdevice->hdr.data.super.obj_mask.super.data[0]) == 0) | 43 | ppmgrdevice->hdr.data.super.obj_mask.super.data[0]) == 0) { |
44 | return -EINVAL; | 44 | return -EINVAL; |
45 | } | ||
45 | 46 | ||
46 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) | 47 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) |
47 | &ppmgrdevice->devices[idx].data.board_obj; | 48 | &ppmgrdevice->devices[idx].data.board_obj; |
@@ -99,8 +100,9 @@ static struct boardobj *construct_pwr_device(struct gk20a *g, | |||
99 | 100 | ||
100 | status = boardobj_construct_super(g, &board_obj_ptr, | 101 | status = boardobj_construct_super(g, &board_obj_ptr, |
101 | pargs_size, pargs); | 102 | pargs_size, pargs); |
102 | if (status) | 103 | if (status) { |
103 | return NULL; | 104 | return NULL; |
105 | } | ||
104 | 106 | ||
105 | pwrdev = (struct pwr_device_ina3221*)board_obj_ptr; | 107 | pwrdev = (struct pwr_device_ina3221*)board_obj_ptr; |
106 | 108 | ||
@@ -250,8 +252,9 @@ static int devinit_get_pwr_device_table(struct gk20a *g, | |||
250 | pwr_device_data.ina3221.curr_correct_m = (1 << 12); | 252 | pwr_device_data.ina3221.curr_correct_m = (1 << 12); |
251 | } | 253 | } |
252 | pwr_device_size = sizeof(struct pwr_device_ina3221); | 254 | pwr_device_size = sizeof(struct pwr_device_ina3221); |
253 | } else | 255 | } else { |
254 | continue; | 256 | continue; |
257 | } | ||
255 | 258 | ||
256 | pwr_device_data.boardobj.type = CTRL_PMGR_PWR_DEVICE_TYPE_INA3221; | 259 | pwr_device_data.boardobj.type = CTRL_PMGR_PWR_DEVICE_TYPE_INA3221; |
257 | pwr_device_data.pwrdev.power_rail = (u8)0; | 260 | pwr_device_data.pwrdev.power_rail = (u8)0; |
@@ -306,8 +309,9 @@ int pmgr_device_sw_setup(struct gk20a *g) | |||
306 | pboardobjgrp->pmudatainstget = _pwr_device_pmudata_instget; | 309 | pboardobjgrp->pmudatainstget = _pwr_device_pmudata_instget; |
307 | 310 | ||
308 | status = devinit_get_pwr_device_table(g, ppwrdeviceobjs); | 311 | status = devinit_get_pwr_device_table(g, ppwrdeviceobjs); |
309 | if (status) | 312 | if (status) { |
310 | goto done; | 313 | goto done; |
314 | } | ||
311 | 315 | ||
312 | done: | 316 | done: |
313 | nvgpu_log_info(g, " done status %x", status); | 317 | nvgpu_log_info(g, " done status %x", status); |
diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c index 53c7a1c4..9b2f91de 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c +++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c | |||
@@ -40,8 +40,9 @@ static int _pwr_channel_pmudata_instget(struct gk20a *g, | |||
40 | 40 | ||
41 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ | 41 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ |
42 | if (((u32)BIT(idx) & | 42 | if (((u32)BIT(idx) & |
43 | ppmgrchannel->hdr.data.super.obj_mask.super.data[0]) == 0) | 43 | ppmgrchannel->hdr.data.super.obj_mask.super.data[0]) == 0) { |
44 | return -EINVAL; | 44 | return -EINVAL; |
45 | } | ||
45 | 46 | ||
46 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) | 47 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) |
47 | &ppmgrchannel->channels[idx].data.board_obj; | 48 | &ppmgrchannel->channels[idx].data.board_obj; |
@@ -66,8 +67,9 @@ static int _pwr_channel_rels_pmudata_instget(struct gk20a *g, | |||
66 | 67 | ||
67 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ | 68 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ |
68 | if (((u32)BIT(idx) & | 69 | if (((u32)BIT(idx) & |
69 | ppmgrchrels->hdr.data.super.obj_mask.super.data[0]) == 0) | 70 | ppmgrchrels->hdr.data.super.obj_mask.super.data[0]) == 0) { |
70 | return -EINVAL; | 71 | return -EINVAL; |
72 | } | ||
71 | 73 | ||
72 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) | 74 | *ppboardobjpmudata = (struct nv_pmu_boardobj *) |
73 | &ppmgrchrels->ch_rels[idx].data.board_obj; | 75 | &ppmgrchrels->ch_rels[idx].data.board_obj; |
@@ -150,8 +152,9 @@ static struct boardobj *construct_pwr_topology(struct gk20a *g, | |||
150 | 152 | ||
151 | status = boardobj_construct_super(g, &board_obj_ptr, | 153 | status = boardobj_construct_super(g, &board_obj_ptr, |
152 | pargs_size, pargs); | 154 | pargs_size, pargs); |
153 | if (status) | 155 | if (status) { |
154 | return NULL; | 156 | return NULL; |
157 | } | ||
155 | 158 | ||
156 | pwrchannel = (struct pwr_channel_sensor*)board_obj_ptr; | 159 | pwrchannel = (struct pwr_channel_sensor*)board_obj_ptr; |
157 | 160 | ||
@@ -253,8 +256,9 @@ static int devinit_get_pwr_topology_table(struct gk20a *g, | |||
253 | NV_VBIOS_POWER_TOPOLOGY_2X_ENTRY_PARAM1_SENSOR_PROVIDER_INDEX); | 256 | NV_VBIOS_POWER_TOPOLOGY_2X_ENTRY_PARAM1_SENSOR_PROVIDER_INDEX); |
254 | 257 | ||
255 | pwr_topology_size = sizeof(struct pwr_channel_sensor); | 258 | pwr_topology_size = sizeof(struct pwr_channel_sensor); |
256 | } else | 259 | } else { |
257 | continue; | 260 | continue; |
261 | } | ||
258 | 262 | ||
259 | /* Initialize data for the parent class */ | 263 | /* Initialize data for the parent class */ |
260 | pwr_topology_data.boardobj.type = CTRL_PMGR_PWR_CHANNEL_TYPE_SENSOR; | 264 | pwr_topology_data.boardobj.type = CTRL_PMGR_PWR_CHANNEL_TYPE_SENSOR; |
@@ -345,12 +349,14 @@ int pmgr_monitor_sw_setup(struct gk20a *g) | |||
345 | ppwrmonitorobjs = &(g->pmgr_pmu.pmgr_monitorobjs); | 349 | ppwrmonitorobjs = &(g->pmgr_pmu.pmgr_monitorobjs); |
346 | 350 | ||
347 | status = devinit_get_pwr_topology_table(g, ppwrmonitorobjs); | 351 | status = devinit_get_pwr_topology_table(g, ppwrmonitorobjs); |
348 | if (status) | 352 | if (status) { |
349 | goto done; | 353 | goto done; |
354 | } | ||
350 | 355 | ||
351 | status = _pwr_channel_state_init(g); | 356 | status = _pwr_channel_state_init(g); |
352 | if (status) | 357 | if (status) { |
353 | goto done; | 358 | goto done; |
359 | } | ||
354 | 360 | ||
355 | /* Initialise physicalChannelMask */ | 361 | /* Initialise physicalChannelMask */ |
356 | g->pmgr_pmu.pmgr_monitorobjs.physical_channel_mask = 0; | 362 | g->pmgr_pmu.pmgr_monitorobjs.physical_channel_mask = 0; |
diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c index 13a94e4f..d3fd941e 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c +++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c | |||
@@ -264,8 +264,9 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g, | |||
264 | 264 | ||
265 | status = boardobj_construct_super(g, &board_obj_ptr, | 265 | status = boardobj_construct_super(g, &board_obj_ptr, |
266 | pargs_size, pargs); | 266 | pargs_size, pargs); |
267 | if (status) | 267 | if (status) { |
268 | return NULL; | 268 | return NULL; |
269 | } | ||
269 | 270 | ||
270 | pwrpolicyhwthreshold = (struct pwr_policy_hw_threshold*)board_obj_ptr; | 271 | pwrpolicyhwthreshold = (struct pwr_policy_hw_threshold*)board_obj_ptr; |
271 | pwrpolicy = (struct pwr_policy *)board_obj_ptr; | 272 | pwrpolicy = (struct pwr_policy *)board_obj_ptr; |
@@ -575,8 +576,9 @@ static int devinit_get_pwr_policy_table(struct gk20a *g, | |||
575 | packed_entry->flags0, | 576 | packed_entry->flags0, |
576 | NV_VBIOS_POWER_POLICY_3X_ENTRY_FLAGS0_CLASS); | 577 | NV_VBIOS_POWER_POLICY_3X_ENTRY_FLAGS0_CLASS); |
577 | 578 | ||
578 | if (class_type != NV_VBIOS_POWER_POLICY_3X_ENTRY_FLAGS0_CLASS_HW_THRESHOLD) | 579 | if (class_type != NV_VBIOS_POWER_POLICY_3X_ENTRY_FLAGS0_CLASS_HW_THRESHOLD) { |
579 | continue; | 580 | continue; |
581 | } | ||
580 | 582 | ||
581 | /* unpack power policy table entry */ | 583 | /* unpack power policy table entry */ |
582 | devinit_unpack_pwr_policy_entry(&entry, packed_entry); | 584 | devinit_unpack_pwr_policy_entry(&entry, packed_entry); |
@@ -759,8 +761,9 @@ int pmgr_policy_sw_setup(struct gk20a *g) | |||
759 | pboardobjgrp = &(g->pmgr_pmu.pmgr_policyobjs.pwr_policies.super); | 761 | pboardobjgrp = &(g->pmgr_pmu.pmgr_policyobjs.pwr_policies.super); |
760 | 762 | ||
761 | status = devinit_get_pwr_policy_table(g, ppwrpolicyobjs); | 763 | status = devinit_get_pwr_policy_table(g, ppwrpolicyobjs); |
762 | if (status) | 764 | if (status) { |
763 | goto done; | 765 | goto done; |
766 | } | ||
764 | 767 | ||
765 | g->pmgr_pmu.pmgr_policyobjs.b_enabled = true; | 768 | g->pmgr_pmu.pmgr_policyobjs.b_enabled = true; |
766 | 769 | ||