diff options
Diffstat (limited to 'drivers/gpu/nvgpu/pmgr')
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pmgrpmu.c | 12 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pwrdev.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pwrmonitor.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pwrpolicy.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pmgr/pwrpolicy.h | 2 |
5 files changed, 13 insertions, 13 deletions
diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c index 411550be..b6947f20 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c +++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c | |||
@@ -52,7 +52,7 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, | |||
52 | 52 | ||
53 | if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_SET_OBJECT) { | 53 | if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_SET_OBJECT) { |
54 | if ((msg->msg.pmgr.set_object.b_success != 1) || | 54 | if ((msg->msg.pmgr.set_object.b_success != 1) || |
55 | (msg->msg.pmgr.set_object.flcnstatus != 0) ) { | 55 | (msg->msg.pmgr.set_object.flcnstatus != 0U)) { |
56 | nvgpu_err(g, "pmgr msg failed %x %x %x %x", | 56 | nvgpu_err(g, "pmgr msg failed %x %x %x %x", |
57 | msg->msg.pmgr.set_object.msg_type, | 57 | msg->msg.pmgr.set_object.msg_type, |
58 | msg->msg.pmgr.set_object.b_success, | 58 | msg->msg.pmgr.set_object.b_success, |
@@ -62,7 +62,7 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, | |||
62 | } | 62 | } |
63 | } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_QUERY) { | 63 | } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_QUERY) { |
64 | if ((msg->msg.pmgr.query.b_success != 1) || | 64 | if ((msg->msg.pmgr.query.b_success != 1) || |
65 | (msg->msg.pmgr.query.flcnstatus != 0) ) { | 65 | (msg->msg.pmgr.query.flcnstatus != 0U)) { |
66 | nvgpu_err(g, "pmgr msg failed %x %x %x %x", | 66 | nvgpu_err(g, "pmgr msg failed %x %x %x %x", |
67 | msg->msg.pmgr.query.msg_type, | 67 | msg->msg.pmgr.query.msg_type, |
68 | msg->msg.pmgr.query.b_success, | 68 | msg->msg.pmgr.query.b_success, |
@@ -72,7 +72,7 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, | |||
72 | } | 72 | } |
73 | } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_LOAD) { | 73 | } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_LOAD) { |
74 | if ((msg->msg.pmgr.query.b_success != 1) || | 74 | if ((msg->msg.pmgr.query.b_success != 1) || |
75 | (msg->msg.pmgr.query.flcnstatus != 0) ) { | 75 | (msg->msg.pmgr.query.flcnstatus != 0U)) { |
76 | nvgpu_err(g, "pmgr msg failed %x %x %x", | 76 | nvgpu_err(g, "pmgr msg failed %x %x %x", |
77 | msg->msg.pmgr.load.msg_type, | 77 | msg->msg.pmgr.load.msg_type, |
78 | msg->msg.pmgr.load.b_success, | 78 | msg->msg.pmgr.load.b_success, |
@@ -133,7 +133,7 @@ static u32 pmgr_pmu_set_object(struct gk20a *g, | |||
133 | gk20a_get_gr_idle_timeout(g), | 133 | gk20a_get_gr_idle_timeout(g), |
134 | &handlerparams.success, 1); | 134 | &handlerparams.success, 1); |
135 | 135 | ||
136 | if (handlerparams.success == 0) { | 136 | if (handlerparams.success == 0U) { |
137 | nvgpu_err(g, "could not process cmd"); | 137 | nvgpu_err(g, "could not process cmd"); |
138 | status = -ETIMEDOUT; | 138 | status = -ETIMEDOUT; |
139 | goto exit; | 139 | goto exit; |
@@ -431,7 +431,7 @@ u32 pmgr_pmu_pwr_devices_query_blocking( | |||
431 | gk20a_get_gr_idle_timeout(g), | 431 | gk20a_get_gr_idle_timeout(g), |
432 | &handlerparams.success, 1); | 432 | &handlerparams.success, 1); |
433 | 433 | ||
434 | if (handlerparams.success == 0) { | 434 | if (handlerparams.success == 0U) { |
435 | nvgpu_err(g, "could not process cmd"); | 435 | nvgpu_err(g, "could not process cmd"); |
436 | status = -ETIMEDOUT; | 436 | status = -ETIMEDOUT; |
437 | goto exit; | 437 | goto exit; |
@@ -475,7 +475,7 @@ static u32 pmgr_pmu_load_blocking(struct gk20a *g) | |||
475 | gk20a_get_gr_idle_timeout(g), | 475 | gk20a_get_gr_idle_timeout(g), |
476 | &handlerparams.success, 1); | 476 | &handlerparams.success, 1); |
477 | 477 | ||
478 | if (handlerparams.success == 0) { | 478 | if (handlerparams.success == 0U) { |
479 | nvgpu_err(g, "could not process cmd"); | 479 | nvgpu_err(g, "could not process cmd"); |
480 | status = -ETIMEDOUT; | 480 | status = -ETIMEDOUT; |
481 | goto exit; | 481 | goto exit; |
diff --git a/drivers/gpu/nvgpu/pmgr/pwrdev.c b/drivers/gpu/nvgpu/pmgr/pwrdev.c index cf45f723..c1bf0844 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrdev.c +++ b/drivers/gpu/nvgpu/pmgr/pwrdev.c | |||
@@ -40,7 +40,7 @@ static int _pwr_device_pmudata_instget(struct gk20a *g, | |||
40 | 40 | ||
41 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ | 41 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ |
42 | if (((u32)BIT(idx) & | 42 | if (((u32)BIT(idx) & |
43 | ppmgrdevice->hdr.data.super.obj_mask.super.data[0]) == 0) { | 43 | ppmgrdevice->hdr.data.super.obj_mask.super.data[0]) == 0U) { |
44 | return -EINVAL; | 44 | return -EINVAL; |
45 | } | 45 | } |
46 | 46 | ||
@@ -191,7 +191,7 @@ static int devinit_get_pwr_device_table(struct gk20a *g, | |||
191 | 191 | ||
192 | memcpy(&pwr_sensor_table_entry.class_param0, | 192 | memcpy(&pwr_sensor_table_entry.class_param0, |
193 | (curr_pwr_device_table_ptr + 1), | 193 | (curr_pwr_device_table_ptr + 1), |
194 | (VBIOS_POWER_SENSORS_2X_ENTRY_SIZE_15 - 1)); | 194 | (VBIOS_POWER_SENSORS_2X_ENTRY_SIZE_15 - 1U)); |
195 | 195 | ||
196 | device_type = (u8)BIOS_GET_FIELD( | 196 | device_type = (u8)BIOS_GET_FIELD( |
197 | pwr_sensor_table_entry.flags0, | 197 | pwr_sensor_table_entry.flags0, |
diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c index 28074afb..710ae85b 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c +++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c | |||
@@ -40,7 +40,7 @@ static int _pwr_channel_pmudata_instget(struct gk20a *g, | |||
40 | 40 | ||
41 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ | 41 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ |
42 | if (((u32)BIT(idx) & | 42 | if (((u32)BIT(idx) & |
43 | ppmgrchannel->hdr.data.super.obj_mask.super.data[0]) == 0) { | 43 | ppmgrchannel->hdr.data.super.obj_mask.super.data[0]) == 0U) { |
44 | return -EINVAL; | 44 | return -EINVAL; |
45 | } | 45 | } |
46 | 46 | ||
@@ -67,7 +67,7 @@ static int _pwr_channel_rels_pmudata_instget(struct gk20a *g, | |||
67 | 67 | ||
68 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ | 68 | /*check whether pmuboardobjgrp has a valid boardobj in index*/ |
69 | if (((u32)BIT(idx) & | 69 | if (((u32)BIT(idx) & |
70 | ppmgrchrels->hdr.data.super.obj_mask.super.data[0]) == 0) { | 70 | ppmgrchrels->hdr.data.super.obj_mask.super.data[0]) == 0U) { |
71 | return -EINVAL; | 71 | return -EINVAL; |
72 | } | 72 | } |
73 | 73 | ||
@@ -241,7 +241,7 @@ static int devinit_get_pwr_topology_table(struct gk20a *g, | |||
241 | 241 | ||
242 | memcpy(&pwr_topology_table_entry.param0, | 242 | memcpy(&pwr_topology_table_entry.param0, |
243 | (curr_pwr_topology_table_ptr + 2), | 243 | (curr_pwr_topology_table_ptr + 2), |
244 | (VBIOS_POWER_TOPOLOGY_2X_ENTRY_SIZE_16 - 2)); | 244 | (VBIOS_POWER_TOPOLOGY_2X_ENTRY_SIZE_16 - 2U)); |
245 | 245 | ||
246 | class_type = (u8)BIOS_GET_FIELD( | 246 | class_type = (u8)BIOS_GET_FIELD( |
247 | pwr_topology_table_entry.flags0, | 247 | pwr_topology_table_entry.flags0, |
diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c index 82cf0e78..3bf6f328 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c +++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c | |||
@@ -338,7 +338,7 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g, | |||
338 | pwrpolicy, | 338 | pwrpolicy, |
339 | PWR_POLICY_LIMIT_ID_BATT, | 339 | PWR_POLICY_LIMIT_ID_BATT, |
340 | CTRL_PMGR_PWR_POLICY_LIMIT_INPUT_CLIENT_IDX_RM, | 340 | CTRL_PMGR_PWR_POLICY_LIMIT_INPUT_CLIENT_IDX_RM, |
341 | ((pwrpolicyparams->limit_batt != 0) ? | 341 | ((pwrpolicyparams->limit_batt != 0U) ? |
342 | pwrpolicyparams->limit_batt: | 342 | pwrpolicyparams->limit_batt: |
343 | CTRL_PMGR_PWR_POLICY_LIMIT_MAX)); | 343 | CTRL_PMGR_PWR_POLICY_LIMIT_MAX)); |
344 | 344 | ||
diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.h b/drivers/gpu/nvgpu/pmgr/pwrpolicy.h index 868bc2cb..74f4937d 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.h +++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.h | |||
@@ -29,7 +29,7 @@ | |||
29 | #include "boardobj/boardobj.h" | 29 | #include "boardobj/boardobj.h" |
30 | #include "ctrl/ctrlpmgr.h" | 30 | #include "ctrl/ctrlpmgr.h" |
31 | 31 | ||
32 | #define PWR_POLICY_EXT_POWER_STATE_ID_COUNT 0x4 | 32 | #define PWR_POLICY_EXT_POWER_STATE_ID_COUNT 0x4U |
33 | 33 | ||
34 | enum pwr_policy_limit_id { | 34 | enum pwr_policy_limit_id { |
35 | PWR_POLICY_LIMIT_ID_MIN = 0x00000000, | 35 | PWR_POLICY_LIMIT_ID_MIN = 0x00000000, |