5 files changed, 13 insertions, 13 deletions

diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c
index 411550be..b6947f20 100644
--- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c
+++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c
@@ -52,7 +52,7 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
 
         if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_SET_OBJECT) {
                 if ((msg->msg.pmgr.set_object.b_success != 1) ||
-                        (msg->msg.pmgr.set_object.flcnstatus != 0) ) {
+                        (msg->msg.pmgr.set_object.flcnstatus != 0U)) {
                         nvgpu_err(g, "pmgr msg failed %x %x %x %x",
                                 msg->msg.pmgr.set_object.msg_type,
                                 msg->msg.pmgr.set_object.b_success,
@@ -62,7 +62,7 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
                 }
         } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_QUERY) {
                 if ((msg->msg.pmgr.query.b_success != 1) ||
-                        (msg->msg.pmgr.query.flcnstatus != 0) ) {
+                        (msg->msg.pmgr.query.flcnstatus != 0U)) {
                         nvgpu_err(g, "pmgr msg failed %x %x %x %x",
                                 msg->msg.pmgr.query.msg_type,
                                 msg->msg.pmgr.query.b_success,
@@ -72,7 +72,7 @@ static void pmgr_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
                 }
         } else if (msg->msg.pmgr.msg_type == NV_PMU_PMGR_MSG_ID_LOAD) {
                 if ((msg->msg.pmgr.query.b_success != 1) ||
-                        (msg->msg.pmgr.query.flcnstatus != 0) ) {
+                        (msg->msg.pmgr.query.flcnstatus != 0U)) {
                         nvgpu_err(g, "pmgr msg failed %x %x %x",
                                 msg->msg.pmgr.load.msg_type,
                                 msg->msg.pmgr.load.b_success,
@@ -133,7 +133,7 @@ static u32 pmgr_pmu_set_object(struct gk20a *g,
                         gk20a_get_gr_idle_timeout(g),
                         &handlerparams.success, 1);
 
-        if (handlerparams.success == 0) {
+        if (handlerparams.success == 0U) {
                 nvgpu_err(g, "could not process cmd");
                 status = -ETIMEDOUT;
                 goto exit;
@@ -431,7 +431,7 @@ u32 pmgr_pmu_pwr_devices_query_blocking(
                         gk20a_get_gr_idle_timeout(g),
                         &handlerparams.success, 1);
 
-        if (handlerparams.success == 0) {
+        if (handlerparams.success == 0U) {
                 nvgpu_err(g, "could not process cmd");
                 status = -ETIMEDOUT;
                 goto exit;
@@ -475,7 +475,7 @@ static u32 pmgr_pmu_load_blocking(struct gk20a *g)
                         gk20a_get_gr_idle_timeout(g),
                         &handlerparams.success, 1);
 
-        if (handlerparams.success == 0) {
+        if (handlerparams.success == 0U) {
                 nvgpu_err(g, "could not process cmd");
                 status = -ETIMEDOUT;
                 goto exit;
diff --git a/drivers/gpu/nvgpu/pmgr/pwrdev.c b/drivers/gpu/nvgpu/pmgr/pwrdev.c
index cf45f723..c1bf0844 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrdev.c
+++ b/drivers/gpu/nvgpu/pmgr/pwrdev.c
@@ -40,7 +40,7 @@ static int _pwr_device_pmudata_instget(struct gk20a *g,
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
-                ppmgrdevice->hdr.data.super.obj_mask.super.data[0]) == 0) {
+                ppmgrdevice->hdr.data.super.obj_mask.super.data[0]) == 0U) {
                 return -EINVAL;
         }
 
@@ -191,7 +191,7 @@ static int devinit_get_pwr_device_table(struct gk20a *g,
 
                 memcpy(&pwr_sensor_table_entry.class_param0,
                         (curr_pwr_device_table_ptr + 1),
-                        (VBIOS_POWER_SENSORS_2X_ENTRY_SIZE_15 - 1));
+                        (VBIOS_POWER_SENSORS_2X_ENTRY_SIZE_15 - 1U));
 
                 device_type = (u8)BIOS_GET_FIELD(
                         pwr_sensor_table_entry.flags0,
diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c
index 28074afb..710ae85b 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c
+++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c
@@ -40,7 +40,7 @@ static int _pwr_channel_pmudata_instget(struct gk20a *g,
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
-                ppmgrchannel->hdr.data.super.obj_mask.super.data[0]) == 0) {
+                ppmgrchannel->hdr.data.super.obj_mask.super.data[0]) == 0U) {
                 return -EINVAL;
         }
 
@@ -67,7 +67,7 @@ static int _pwr_channel_rels_pmudata_instget(struct gk20a *g,
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
-                ppmgrchrels->hdr.data.super.obj_mask.super.data[0]) == 0) {
+                ppmgrchrels->hdr.data.super.obj_mask.super.data[0]) == 0U) {
                 return -EINVAL;
         }
 
@@ -241,7 +241,7 @@ static int devinit_get_pwr_topology_table(struct gk20a *g,
 
                 memcpy(&pwr_topology_table_entry.param0,
                         (curr_pwr_topology_table_ptr + 2),
-                        (VBIOS_POWER_TOPOLOGY_2X_ENTRY_SIZE_16 - 2));
+                        (VBIOS_POWER_TOPOLOGY_2X_ENTRY_SIZE_16 - 2U));
 
                 class_type = (u8)BIOS_GET_FIELD(
                         pwr_topology_table_entry.flags0,
diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c
index 82cf0e78..3bf6f328 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c
+++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c
@@ -338,7 +338,7 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g,
                         pwrpolicy,
                         PWR_POLICY_LIMIT_ID_BATT,
                         CTRL_PMGR_PWR_POLICY_LIMIT_INPUT_CLIENT_IDX_RM,
-                        ((pwrpolicyparams->limit_batt != 0) ?
+                        ((pwrpolicyparams->limit_batt != 0U) ?
                                 pwrpolicyparams->limit_batt:
                                 CTRL_PMGR_PWR_POLICY_LIMIT_MAX));
 
diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.h b/drivers/gpu/nvgpu/pmgr/pwrpolicy.h
index 868bc2cb..74f4937d 100644
--- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.h
+++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.h
@@ -29,7 +29,7 @@
 #include "boardobj/boardobj.h"
 #include "ctrl/ctrlpmgr.h"
 
-#define PWR_POLICY_EXT_POWER_STATE_ID_COUNT 0x4
+#define PWR_POLICY_EXT_POWER_STATE_ID_COUNT 0x4U
 
 enum pwr_policy_limit_id {
         PWR_POLICY_LIMIT_ID_MIN    = 0x00000000,