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path: root/drivers/gpu/nvgpu/pmgr/pmgrpmu.c
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Diffstat (limited to 'drivers/gpu/nvgpu/pmgr/pmgrpmu.c')
-rw-r--r--drivers/gpu/nvgpu/pmgr/pmgrpmu.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c
index 3398e8df..69c43a01 100644
--- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c
+++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -175,11 +175,11 @@ static u32 pmgr_send_i2c_device_topology_to_pmu(struct gk20a *g)
175 return status; 175 return status;
176} 176}
177 177
178static u32 pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g) 178static int pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g)
179{ 179{
180 struct nv_pmu_pmgr_pwr_device_desc_table *pwr_desc_table; 180 struct nv_pmu_pmgr_pwr_device_desc_table *pwr_desc_table;
181 struct nv_pmu_pmgr_pwr_device_desc_table_header *ppwr_desc_header; 181 struct nv_pmu_pmgr_pwr_device_desc_table_header *ppwr_desc_header;
182 u32 status = 0; 182 int status = 0;
183 183
184 /* Set the BA-device-independent HW information */ 184 /* Set the BA-device-independent HW information */
185 pwr_desc_table = nvgpu_kzalloc(g, sizeof(*pwr_desc_table)); 185 pwr_desc_table = nvgpu_kzalloc(g, sizeof(*pwr_desc_table));
@@ -221,13 +221,13 @@ exit:
221 return status; 221 return status;
222} 222}
223 223
224static u32 pmgr_send_pwr_mointer_to_pmu(struct gk20a *g) 224static int pmgr_send_pwr_mointer_to_pmu(struct gk20a *g)
225{ 225{
226 struct nv_pmu_pmgr_pwr_monitor_pack *pwr_monitor_pack = NULL; 226 struct nv_pmu_pmgr_pwr_monitor_pack *pwr_monitor_pack = NULL;
227 struct nv_pmu_pmgr_pwr_channel_header *pwr_channel_hdr; 227 struct nv_pmu_pmgr_pwr_channel_header *pwr_channel_hdr;
228 struct nv_pmu_pmgr_pwr_chrelationship_header *pwr_chrelationship_header; 228 struct nv_pmu_pmgr_pwr_chrelationship_header *pwr_chrelationship_header;
229 u32 max_dmem_size; 229 u32 max_dmem_size;
230 u32 status = 0; 230 int status = 0;
231 231
232 pwr_monitor_pack = nvgpu_kzalloc(g, sizeof(*pwr_monitor_pack)); 232 pwr_monitor_pack = nvgpu_kzalloc(g, sizeof(*pwr_monitor_pack));
233 if (!pwr_monitor_pack) 233 if (!pwr_monitor_pack)
@@ -290,11 +290,11 @@ exit:
290 return status; 290 return status;
291} 291}
292 292
293static u32 pmgr_send_pwr_policy_to_pmu(struct gk20a *g) 293static int pmgr_send_pwr_policy_to_pmu(struct gk20a *g)
294{ 294{
295 struct nv_pmu_pmgr_pwr_policy_pack *ppwrpack = NULL; 295 struct nv_pmu_pmgr_pwr_policy_pack *ppwrpack = NULL;
296 struct pwr_policy *ppolicy = NULL; 296 struct pwr_policy *ppolicy = NULL;
297 u32 status = 0; 297 int status = 0;
298 u8 indx; 298 u8 indx;
299 u32 max_dmem_size; 299 u32 max_dmem_size;
300 300
@@ -479,9 +479,9 @@ exit:
479 return status; 479 return status;
480} 480}
481 481
482u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g) 482int pmgr_send_pmgr_tables_to_pmu(struct gk20a *g)
483{ 483{
484 u32 status = 0; 484 int status = 0;
485 485
486 status = pmgr_send_i2c_device_topology_to_pmu(g); 486 status = pmgr_send_i2c_device_topology_to_pmu(g);
487 487