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-rw-r--r--drivers/gpu/nvgpu/perf/vfe_var.h109
1 files changed, 0 insertions, 109 deletions
diff --git a/drivers/gpu/nvgpu/perf/vfe_var.h b/drivers/gpu/nvgpu/perf/vfe_var.h
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--- a/drivers/gpu/nvgpu/perf/vfe_var.h
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1/*
2 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef NVGPU_PERF_VFE_VAR_H
24#define NVGPU_PERF_VFE_VAR_H
25
26#include "boardobj/boardobjgrp.h"
27#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
28
29int vfe_var_sw_setup(struct gk20a *g);
30int vfe_var_pmu_setup(struct gk20a *g);
31
32#define VFE_VAR_GET(_pperf, _idx) \
33 ((struct vfe_var)BOARDOBJGRP_OBJ_GET_BY_IDX( \
34 &((_pperf)->vfe.vars.super.super), (_idx)))
35
36#define VFE_VAR_IDX_IS_VALID(_pperf, _idx) \
37 boardobjgrp_idxisvalid(&((_pperf)->vfe.vars.super.super), (_idx))
38
39struct vfe_var {
40 struct boardobj super;
41 u32 out_range_min;
42 u32 out_range_max;
43 struct boardobjgrpmask_e32 mask_dependent_vars;
44 struct boardobjgrpmask_e255 mask_dependent_equs;
45 bool b_is_dynamic_valid;
46 bool b_is_dynamic;
47};
48
49struct vfe_vars {
50 struct boardobjgrp_e32 super;
51 u8 polling_periodms;
52};
53
54struct vfe_var_derived {
55 struct vfe_var super;
56};
57
58struct vfe_var_derived_product {
59 struct vfe_var_derived super;
60 u8 var_idx0;
61 u8 var_idx1;
62};
63
64struct vfe_var_derived_sum {
65 struct vfe_var_derived super;
66 u8 var_idx0;
67 u8 var_idx1;
68};
69
70struct vfe_var_single {
71 struct vfe_var super;
72 u8 override_type;
73 u32 override_value;
74};
75
76struct vfe_var_single_frequency {
77 struct vfe_var_single super;
78};
79
80struct vfe_var_single_voltage {
81 struct vfe_var_single super;
82};
83
84struct vfe_var_single_sensed {
85 struct vfe_var_single super;
86};
87
88struct vfe_var_single_sensed_fuse {
89 struct vfe_var_single_sensed super;
90 struct ctrl_perf_vfe_var_single_sensed_fuse_override_info override_info;
91 struct ctrl_perf_vfe_var_single_sensed_fuse_vfield_info vfield_info;
92 struct ctrl_perf_vfe_var_single_sensed_fuse_ver_vfield_info vfield_ver_info;
93 struct ctrl_perf_vfe_var_single_sensed_fuse_value fuse_val_default;
94 bool b_fuse_value_signed;
95 u32 fuse_value_integer;
96 u32 fuse_value_hw_integer;
97 u8 fuse_version;
98 bool b_version_check_done;
99};
100
101struct vfe_var_single_sensed_temp {
102 struct vfe_var_single_sensed super;
103 u8 therm_channel_index;
104 int temp_hysteresis_positive;
105 int temp_hysteresis_negative;
106 int temp_default;
107};
108
109#endif /* NVGPU_PERF_VFE_VAR_H */