diff options
Diffstat (limited to 'drivers/gpu/nvgpu/os')
-rw-r--r-- | drivers/gpu/nvgpu/os/linux/driver_common.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/os/linux/platform_gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/os/linux/platform_gv11b_tegra.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/os/linux/sysfs.c | 15 |
4 files changed, 22 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/os/linux/driver_common.c b/drivers/gpu/nvgpu/os/linux/driver_common.c index 9ff32d68..539f0559 100644 --- a/drivers/gpu/nvgpu/os/linux/driver_common.c +++ b/drivers/gpu/nvgpu/os/linux/driver_common.c | |||
@@ -135,6 +135,7 @@ static void nvgpu_init_timeslice(struct gk20a *g) | |||
135 | static void nvgpu_init_pm_vars(struct gk20a *g) | 135 | static void nvgpu_init_pm_vars(struct gk20a *g) |
136 | { | 136 | { |
137 | struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g)); | 137 | struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g)); |
138 | u32 i = 0; | ||
138 | 139 | ||
139 | /* | 140 | /* |
140 | * Set up initial power settings. For non-slicon platforms, disable | 141 | * Set up initial power settings. For non-slicon platforms, disable |
@@ -172,7 +173,10 @@ static void nvgpu_init_pm_vars(struct gk20a *g) | |||
172 | g->support_pmu = support_gk20a_pmu(dev_from_gk20a(g)); | 173 | g->support_pmu = support_gk20a_pmu(dev_from_gk20a(g)); |
173 | __nvgpu_set_enabled(g, NVGPU_CAN_RAILGATE, platform->can_railgate_init); | 174 | __nvgpu_set_enabled(g, NVGPU_CAN_RAILGATE, platform->can_railgate_init); |
174 | g->can_tpc_powergate = platform->can_tpc_powergate; | 175 | g->can_tpc_powergate = platform->can_tpc_powergate; |
175 | g->valid_tpc_mask = platform->valid_tpc_mask; | 176 | |
177 | for (i = 0; i < MAX_TPC_PG_CONFIGS; i++) | ||
178 | g->valid_tpc_mask[i] = platform->valid_tpc_mask[i]; | ||
179 | |||
176 | g->ldiv_slowdown_factor = platform->ldiv_slowdown_factor_init; | 180 | g->ldiv_slowdown_factor = platform->ldiv_slowdown_factor_init; |
177 | /* if default delay is not set, set default delay to 500msec */ | 181 | /* if default delay is not set, set default delay to 500msec */ |
178 | if (platform->railgate_delay_init) | 182 | if (platform->railgate_delay_init) |
diff --git a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h index 3a0227a1..a19d0a7c 100644 --- a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h +++ b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h | |||
@@ -74,7 +74,7 @@ struct gk20a_platform { | |||
74 | struct reset_control *reset_control; | 74 | struct reset_control *reset_control; |
75 | #endif | 75 | #endif |
76 | /* valid TPC-MASK */ | 76 | /* valid TPC-MASK */ |
77 | u32 valid_tpc_mask; | 77 | u32 valid_tpc_mask[MAX_TPC_PG_CONFIGS]; |
78 | 78 | ||
79 | /* Delay before rail gated */ | 79 | /* Delay before rail gated */ |
80 | int railgate_delay_init; | 80 | int railgate_delay_init; |
diff --git a/drivers/gpu/nvgpu/os/linux/platform_gv11b_tegra.c b/drivers/gpu/nvgpu/os/linux/platform_gv11b_tegra.c index 41cba0f0..dafa05e5 100644 --- a/drivers/gpu/nvgpu/os/linux/platform_gv11b_tegra.c +++ b/drivers/gpu/nvgpu/os/linux/platform_gv11b_tegra.c | |||
@@ -233,7 +233,9 @@ struct gk20a_platform gv11b_tegra_platform = { | |||
233 | .can_railgate_init = true, | 233 | .can_railgate_init = true, |
234 | 234 | ||
235 | .can_tpc_powergate = true, | 235 | .can_tpc_powergate = true, |
236 | .valid_tpc_mask = 0xc, | 236 | .valid_tpc_mask[0] = 0x0, |
237 | .valid_tpc_mask[1] = 0x1, | ||
238 | .valid_tpc_mask[2] = 0x5, | ||
237 | 239 | ||
238 | .can_slcg = true, | 240 | .can_slcg = true, |
239 | .can_blcg = true, | 241 | .can_blcg = true, |
diff --git a/drivers/gpu/nvgpu/os/linux/sysfs.c b/drivers/gpu/nvgpu/os/linux/sysfs.c index 9e48e45d..1ffb6539 100644 --- a/drivers/gpu/nvgpu/os/linux/sysfs.c +++ b/drivers/gpu/nvgpu/os/linux/sysfs.c | |||
@@ -865,6 +865,18 @@ static ssize_t tpc_pg_mask_read(struct device *dev, | |||
865 | return snprintf(buf, PAGE_SIZE, "%d\n", g->tpc_pg_mask); | 865 | return snprintf(buf, PAGE_SIZE, "%d\n", g->tpc_pg_mask); |
866 | } | 866 | } |
867 | 867 | ||
868 | static bool is_tpc_mask_valid(struct gk20a *g, u32 tpc_mask) | ||
869 | { | ||
870 | u32 i; | ||
871 | bool valid = false; | ||
872 | |||
873 | for (i = 0; i < MAX_TPC_PG_CONFIGS; i++) { | ||
874 | if (tpc_mask == g->valid_tpc_mask[i]) | ||
875 | valid = true; | ||
876 | } | ||
877 | return valid; | ||
878 | } | ||
879 | |||
868 | static ssize_t tpc_pg_mask_store(struct device *dev, | 880 | static ssize_t tpc_pg_mask_store(struct device *dev, |
869 | struct device_attribute *attr, const char *buf, size_t count) | 881 | struct device_attribute *attr, const char *buf, size_t count) |
870 | { | 882 | { |
@@ -896,10 +908,9 @@ static ssize_t tpc_pg_mask_store(struct device *dev, | |||
896 | return -ENODEV; | 908 | return -ENODEV; |
897 | } | 909 | } |
898 | 910 | ||
899 | if (val == TPC_MASK_FOR_ALL_ACTIVE_TPCs || val == g->valid_tpc_mask) { | 911 | if (is_tpc_mask_valid(g, (u32)val)) { |
900 | g->tpc_pg_mask = val; | 912 | g->tpc_pg_mask = val; |
901 | } else { | 913 | } else { |
902 | |||
903 | nvgpu_err(g, "TPC-PG mask is invalid"); | 914 | nvgpu_err(g, "TPC-PG mask is invalid"); |
904 | nvgpu_mutex_release(&g->tpc_pg_lock); | 915 | nvgpu_mutex_release(&g->tpc_pg_lock); |
905 | return -EINVAL; | 916 | return -EINVAL; |