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-rw-r--r--drivers/gpu/nvgpu/os/linux/clk.c19
-rw-r--r--drivers/gpu/nvgpu/os/linux/platform_gk20a.h5
-rw-r--r--drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c4
-rw-r--r--drivers/gpu/nvgpu/os/linux/platform_gp10b_tegra.c4
4 files changed, 8 insertions, 24 deletions
diff --git a/drivers/gpu/nvgpu/os/linux/clk.c b/drivers/gpu/nvgpu/os/linux/clk.c
index 36c13577..6575a037 100644
--- a/drivers/gpu/nvgpu/os/linux/clk.c
+++ b/drivers/gpu/nvgpu/os/linux/clk.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Linux clock support 2 * Linux clock support
3 * 3 *
4 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -38,13 +38,9 @@ static unsigned long nvgpu_linux_clk_get_rate(struct gk20a *g, u32 api_domain)
38 switch (api_domain) { 38 switch (api_domain) {
39 case CTRL_CLK_DOMAIN_GPCCLK: 39 case CTRL_CLK_DOMAIN_GPCCLK:
40 if (g->clk.tegra_clk) 40 if (g->clk.tegra_clk)
41 ret = g->clk.cached_rate ? 41 ret = clk_get_rate(g->clk.tegra_clk);
42 g->clk.cached_rate :
43 clk_get_rate(g->clk.tegra_clk);
44 else 42 else
45 ret = platform->cached_rate ? 43 ret = clk_get_rate(platform->clk[0]);
46 platform->cached_rate :
47 clk_get_rate(platform->clk[0]);
48 break; 44 break;
49 case CTRL_CLK_DOMAIN_PWRCLK: 45 case CTRL_CLK_DOMAIN_PWRCLK:
50 ret = clk_get_rate(platform->clk[1]); 46 ret = clk_get_rate(platform->clk[1]);
@@ -66,15 +62,10 @@ static int nvgpu_linux_clk_set_rate(struct gk20a *g,
66 62
67 switch (api_domain) { 63 switch (api_domain) {
68 case CTRL_CLK_DOMAIN_GPCCLK: 64 case CTRL_CLK_DOMAIN_GPCCLK:
69 if (g->clk.tegra_clk) { 65 if (g->clk.tegra_clk)
70 ret = clk_set_rate(g->clk.tegra_clk, rate); 66 ret = clk_set_rate(g->clk.tegra_clk, rate);
71 if (!ret) 67 else
72 g->clk.cached_rate = rate;
73 } else {
74 ret = clk_set_rate(platform->clk[0], rate); 68 ret = clk_set_rate(platform->clk[0], rate);
75 if (!ret)
76 platform->cached_rate = rate;
77 }
78 break; 69 break;
79 case CTRL_CLK_DOMAIN_PWRCLK: 70 case CTRL_CLK_DOMAIN_PWRCLK:
80 ret = clk_set_rate(platform->clk[1], rate); 71 ret = clk_set_rate(platform->clk[1], rate);
diff --git a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h
index a19d0a7c..1331c941 100644
--- a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h
+++ b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * GK20A Platform (SoC) Interface 2 * GK20A Platform (SoC) Interface
3 * 3 *
4 * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -271,9 +271,6 @@ struct gk20a_platform {
271 /* stream id to use */ 271 /* stream id to use */
272 u32 ltc_streamid; 272 u32 ltc_streamid;
273 273
274 /* scaling rate */
275 unsigned long cached_rate;
276
277 /* synchronized access to platform->clk_get_freqs */ 274 /* synchronized access to platform->clk_get_freqs */
278 struct nvgpu_mutex clk_get_freq_lock; 275 struct nvgpu_mutex clk_get_freq_lock;
279}; 276};
diff --git a/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c
index 408e546f..6a453096 100644
--- a/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c
+++ b/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * GK20A Tegra Platform Interface 2 * GK20A Tegra Platform Interface
3 * 3 *
4 * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -497,8 +497,6 @@ static int gk20a_tegra_get_clocks(struct device *dev)
497 rate = clk_round_rate(c, rate); 497 rate = clk_round_rate(c, rate);
498 clk_set_rate(c, rate); 498 clk_set_rate(c, rate);
499 platform->clk[i] = c; 499 platform->clk[i] = c;
500 if (i == 0)
501 platform->cached_rate = rate;
502 } 500 }
503 platform->num_clks = i; 501 platform->num_clks = i;
504 502
diff --git a/drivers/gpu/nvgpu/os/linux/platform_gp10b_tegra.c b/drivers/gpu/nvgpu/os/linux/platform_gp10b_tegra.c
index a8308496..c5527f2d 100644
--- a/drivers/gpu/nvgpu/os/linux/platform_gp10b_tegra.c
+++ b/drivers/gpu/nvgpu/os/linux/platform_gp10b_tegra.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * GP10B Tegra Platform Interface 2 * GP10B Tegra Platform Interface
3 * 3 *
4 * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -95,8 +95,6 @@ int gp10b_tegra_get_clocks(struct device *dev)
95 } else { 95 } else {
96 clk_set_rate(c, rate); 96 clk_set_rate(c, rate);
97 platform->clk[i] = c; 97 platform->clk[i] = c;
98 if (i == 0)
99 platform->cached_rate = rate;
100 } 98 }
101 } 99 }
102 platform->num_clks = i; 100 platform->num_clks = i;