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-rw-r--r--drivers/gpu/nvgpu/os/linux/cde.c19
-rw-r--r--drivers/gpu/nvgpu/os/linux/ioctl_channel.c86
2 files changed, 72 insertions, 33 deletions
diff --git a/drivers/gpu/nvgpu/os/linux/cde.c b/drivers/gpu/nvgpu/os/linux/cde.c
index 7b2cba7d..715513c9 100644
--- a/drivers/gpu/nvgpu/os/linux/cde.c
+++ b/drivers/gpu/nvgpu/os/linux/cde.c
@@ -1312,7 +1312,7 @@ static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx)
1312 struct channel_gk20a *ch; 1312 struct channel_gk20a *ch;
1313 struct tsg_gk20a *tsg; 1313 struct tsg_gk20a *tsg;
1314 struct gr_gk20a *gr = &g->gr; 1314 struct gr_gk20a *gr = &g->gr;
1315 struct nvgpu_gpfifo_args gpfifo_args; 1315 struct nvgpu_setup_bind_args setup_bind_args;
1316 int err = 0; 1316 int err = 0;
1317 u64 vaddr; 1317 u64 vaddr;
1318 1318
@@ -1351,17 +1351,16 @@ static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx)
1351 err = gk20a_tsg_bind_channel(tsg, ch); 1351 err = gk20a_tsg_bind_channel(tsg, ch);
1352 if (err) { 1352 if (err) {
1353 nvgpu_err(g, "cde: unable to bind to tsg"); 1353 nvgpu_err(g, "cde: unable to bind to tsg");
1354 goto err_alloc_gpfifo; 1354 goto err_setup_bind;
1355 } 1355 }
1356 1356
1357 gpfifo_args.num_entries = 1024; 1357 setup_bind_args.num_gpfifo_entries = 1024;
1358 gpfifo_args.num_inflight_jobs = 0; 1358 setup_bind_args.num_inflight_jobs = 0;
1359 gpfifo_args.flags = 0; 1359 setup_bind_args.flags = 0;
1360 /* allocate gpfifo (1024 should be more than enough) */ 1360 err = nvgpu_channel_setup_bind(ch, &setup_bind_args);
1361 err = gk20a_channel_alloc_gpfifo(ch, &gpfifo_args);
1362 if (err) { 1361 if (err) {
1363 nvgpu_warn(g, "cde: unable to allocate gpfifo"); 1362 nvgpu_warn(g, "cde: unable to setup channel");
1364 goto err_alloc_gpfifo; 1363 goto err_setup_bind;
1365 } 1364 }
1366 1365
1367 /* map backing store to gpu virtual space */ 1366 /* map backing store to gpu virtual space */
@@ -1399,7 +1398,7 @@ static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx)
1399err_init_cde_img: 1398err_init_cde_img:
1400 nvgpu_gmmu_unmap(ch->vm, &g->gr.compbit_store.mem, vaddr); 1399 nvgpu_gmmu_unmap(ch->vm, &g->gr.compbit_store.mem, vaddr);
1401err_map_backingstore: 1400err_map_backingstore:
1402err_alloc_gpfifo: 1401err_setup_bind:
1403 nvgpu_vm_put(ch->vm); 1402 nvgpu_vm_put(ch->vm);
1404err_commit_va: 1403err_commit_va:
1405err_get_gk20a_channel: 1404err_get_gk20a_channel:
diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_channel.c b/drivers/gpu/nvgpu/os/linux/ioctl_channel.c
index d0d4b1af..d243c425 100644
--- a/drivers/gpu/nvgpu/os/linux/ioctl_channel.c
+++ b/drivers/gpu/nvgpu/os/linux/ioctl_channel.c
@@ -577,45 +577,59 @@ clean_up:
577 return err; 577 return err;
578} 578}
579 579
580static u32 nvgpu_gpfifo_user_flags_to_common_flags(u32 user_flags) 580static u32 nvgpu_setup_bind_user_flags_to_common_flags(u32 user_flags)
581{ 581{
582 u32 flags = 0; 582 u32 flags = 0;
583 583
584 if (user_flags & NVGPU_ALLOC_GPFIFO_EX_FLAGS_VPR_ENABLED) 584 if (user_flags & NVGPU_CHANNEL_SETUP_BIND_FLAGS_VPR_ENABLED)
585 flags |= NVGPU_GPFIFO_FLAGS_SUPPORT_VPR; 585 flags |= NVGPU_SETUP_BIND_FLAGS_SUPPORT_VPR;
586 586
587 if (user_flags & NVGPU_ALLOC_GPFIFO_EX_FLAGS_DETERMINISTIC) 587 if (user_flags & NVGPU_CHANNEL_SETUP_BIND_FLAGS_DETERMINISTIC)
588 flags |= NVGPU_GPFIFO_FLAGS_SUPPORT_DETERMINISTIC; 588 flags |= NVGPU_SETUP_BIND_FLAGS_SUPPORT_DETERMINISTIC;
589 589
590 if (user_flags & NVGPU_ALLOC_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE) 590 if (user_flags & NVGPU_CHANNEL_SETUP_BIND_FLAGS_REPLAYABLE_FAULTS_ENABLE)
591 flags |= NVGPU_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE; 591 flags |= NVGPU_SETUP_BIND_FLAGS_REPLAYABLE_FAULTS_ENABLE;
592 592
593 return flags; 593 return flags;
594} 594}
595 595
596static void nvgpu_get_setup_bind_args(
597 struct nvgpu_channel_setup_bind_args *channel_setup_bind_args,
598 struct nvgpu_setup_bind_args *setup_bind_args)
599{
600 setup_bind_args->num_gpfifo_entries =
601 channel_setup_bind_args->num_gpfifo_entries;
602 setup_bind_args->num_inflight_jobs =
603 channel_setup_bind_args->num_inflight_jobs;
604 setup_bind_args->flags = nvgpu_setup_bind_user_flags_to_common_flags(
605 channel_setup_bind_args->flags);
606}
607
596static void nvgpu_get_gpfifo_ex_args( 608static void nvgpu_get_gpfifo_ex_args(
597 struct nvgpu_alloc_gpfifo_ex_args *alloc_gpfifo_ex_args, 609 struct nvgpu_alloc_gpfifo_ex_args *alloc_gpfifo_ex_args,
598 struct nvgpu_gpfifo_args *gpfifo_args) 610 struct nvgpu_setup_bind_args *setup_bind_args)
599{ 611{
600 gpfifo_args->num_entries = alloc_gpfifo_ex_args->num_entries; 612 setup_bind_args->num_gpfifo_entries = alloc_gpfifo_ex_args->num_entries;
601 gpfifo_args->num_inflight_jobs = alloc_gpfifo_ex_args->num_inflight_jobs; 613 setup_bind_args->num_inflight_jobs =
602 gpfifo_args->flags = nvgpu_gpfifo_user_flags_to_common_flags( 614 alloc_gpfifo_ex_args->num_inflight_jobs;
603 alloc_gpfifo_ex_args->flags); 615 setup_bind_args->flags = nvgpu_setup_bind_user_flags_to_common_flags(
616 alloc_gpfifo_ex_args->flags);
604} 617}
605 618
606static void nvgpu_get_gpfifo_args( 619static void nvgpu_get_gpfifo_args(
607 struct nvgpu_alloc_gpfifo_args *alloc_gpfifo_args, 620 struct nvgpu_alloc_gpfifo_args *alloc_gpfifo_args,
608 struct nvgpu_gpfifo_args *gpfifo_args) 621 struct nvgpu_setup_bind_args *setup_bind_args)
609{ 622{
610 /* 623 /*
611 * Kernel can insert one extra gpfifo entry before user 624 * Kernel can insert one extra gpfifo entry before user
612 * submitted gpfifos and another one after, for internal usage. 625 * submitted gpfifos and another one after, for internal usage.
613 * Triple the requested size. 626 * Triple the requested size.
614 */ 627 */
615 gpfifo_args->num_entries = alloc_gpfifo_args->num_entries * 3; 628 setup_bind_args->num_gpfifo_entries =
616 gpfifo_args->num_inflight_jobs = 0; 629 alloc_gpfifo_args->num_entries * 3;
617 gpfifo_args->flags = nvgpu_gpfifo_user_flags_to_common_flags( 630 setup_bind_args->num_inflight_jobs = 0;
618 alloc_gpfifo_args->flags); 631 setup_bind_args->flags = nvgpu_setup_bind_user_flags_to_common_flags(
632 alloc_gpfifo_args->flags);
619} 633}
620 634
621static void nvgpu_get_fence_args( 635static void nvgpu_get_fence_args(
@@ -1119,13 +1133,39 @@ long gk20a_channel_ioctl(struct file *filp,
1119 gk20a_idle(ch->g); 1133 gk20a_idle(ch->g);
1120 break; 1134 break;
1121 } 1135 }
1136 case NVGPU_IOCTL_CHANNEL_SETUP_BIND:
1137 {
1138 struct nvgpu_channel_setup_bind_args *channel_setup_bind_args =
1139 (struct nvgpu_channel_setup_bind_args *)buf;
1140 struct nvgpu_setup_bind_args setup_bind_args;
1141
1142 nvgpu_get_setup_bind_args(channel_setup_bind_args,
1143 &setup_bind_args);
1144
1145 err = gk20a_busy(ch->g);
1146 if (err) {
1147 dev_err(dev,
1148 "%s: failed to host gk20a for ioctl cmd: 0x%x",
1149 __func__, cmd);
1150 break;
1151 }
1152
1153 if (!is_power_of_2(setup_bind_args.num_gpfifo_entries)) {
1154 err = -EINVAL;
1155 gk20a_idle(ch->g);
1156 break;
1157 }
1158 err = nvgpu_channel_setup_bind(ch, &setup_bind_args);
1159 gk20a_idle(ch->g);
1160 break;
1161 }
1122 case NVGPU_IOCTL_CHANNEL_ALLOC_GPFIFO_EX: 1162 case NVGPU_IOCTL_CHANNEL_ALLOC_GPFIFO_EX:
1123 { 1163 {
1124 struct nvgpu_alloc_gpfifo_ex_args *alloc_gpfifo_ex_args = 1164 struct nvgpu_alloc_gpfifo_ex_args *alloc_gpfifo_ex_args =
1125 (struct nvgpu_alloc_gpfifo_ex_args *)buf; 1165 (struct nvgpu_alloc_gpfifo_ex_args *)buf;
1126 struct nvgpu_gpfifo_args gpfifo_args; 1166 struct nvgpu_setup_bind_args setup_bind_args;
1127 1167
1128 nvgpu_get_gpfifo_ex_args(alloc_gpfifo_ex_args, &gpfifo_args); 1168 nvgpu_get_gpfifo_ex_args(alloc_gpfifo_ex_args, &setup_bind_args);
1129 1169
1130 err = gk20a_busy(ch->g); 1170 err = gk20a_busy(ch->g);
1131 if (err) { 1171 if (err) {
@@ -1140,7 +1180,7 @@ long gk20a_channel_ioctl(struct file *filp,
1140 gk20a_idle(ch->g); 1180 gk20a_idle(ch->g);
1141 break; 1181 break;
1142 } 1182 }
1143 err = gk20a_channel_alloc_gpfifo(ch, &gpfifo_args); 1183 err = nvgpu_channel_setup_bind(ch, &setup_bind_args);
1144 gk20a_idle(ch->g); 1184 gk20a_idle(ch->g);
1145 break; 1185 break;
1146 } 1186 }
@@ -1148,9 +1188,9 @@ long gk20a_channel_ioctl(struct file *filp,
1148 { 1188 {
1149 struct nvgpu_alloc_gpfifo_args *alloc_gpfifo_args = 1189 struct nvgpu_alloc_gpfifo_args *alloc_gpfifo_args =
1150 (struct nvgpu_alloc_gpfifo_args *)buf; 1190 (struct nvgpu_alloc_gpfifo_args *)buf;
1151 struct nvgpu_gpfifo_args gpfifo_args; 1191 struct nvgpu_setup_bind_args setup_bind_args;
1152 1192
1153 nvgpu_get_gpfifo_args(alloc_gpfifo_args, &gpfifo_args); 1193 nvgpu_get_gpfifo_args(alloc_gpfifo_args, &setup_bind_args);
1154 1194
1155 err = gk20a_busy(ch->g); 1195 err = gk20a_busy(ch->g);
1156 if (err) { 1196 if (err) {
@@ -1160,7 +1200,7 @@ long gk20a_channel_ioctl(struct file *filp,
1160 break; 1200 break;
1161 } 1201 }
1162 1202
1163 err = gk20a_channel_alloc_gpfifo(ch, &gpfifo_args); 1203 err = nvgpu_channel_setup_bind(ch, &setup_bind_args);
1164 gk20a_idle(ch->g); 1204 gk20a_idle(ch->g);
1165 break; 1205 break;
1166 } 1206 }