diff options
Diffstat (limited to 'drivers/gpu/nvgpu/os/linux/vgpu/vgpu_linux.c')
-rw-r--r-- | drivers/gpu/nvgpu/os/linux/vgpu/vgpu_linux.c | 475 |
1 files changed, 475 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/os/linux/vgpu/vgpu_linux.c b/drivers/gpu/nvgpu/os/linux/vgpu/vgpu_linux.c new file mode 100644 index 00000000..a7612e54 --- /dev/null +++ b/drivers/gpu/nvgpu/os/linux/vgpu/vgpu_linux.c | |||
@@ -0,0 +1,475 @@ | |||
1 | /* | ||
2 | * Virtualized GPU for Linux | ||
3 | * | ||
4 | * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
17 | */ | ||
18 | |||
19 | #include <linux/mm.h> | ||
20 | #include <linux/dma-mapping.h> | ||
21 | #include <linux/pm_runtime.h> | ||
22 | #include <linux/pm_qos.h> | ||
23 | #include <linux/platform_device.h> | ||
24 | #include <soc/tegra/chip-id.h> | ||
25 | |||
26 | #include <nvgpu/kmem.h> | ||
27 | #include <nvgpu/bug.h> | ||
28 | #include <nvgpu/enabled.h> | ||
29 | #include <nvgpu/debug.h> | ||
30 | #include <nvgpu/soc.h> | ||
31 | #include <nvgpu/ctxsw_trace.h> | ||
32 | #include <nvgpu/defaults.h> | ||
33 | #include <nvgpu/ltc.h> | ||
34 | |||
35 | #include "vgpu_linux.h" | ||
36 | #include "vgpu/fecs_trace_vgpu.h" | ||
37 | #include "clk_vgpu.h" | ||
38 | #include "gk20a/tsg_gk20a.h" | ||
39 | #include "gk20a/channel_gk20a.h" | ||
40 | #include "gk20a/regops_gk20a.h" | ||
41 | #include "gm20b/hal_gm20b.h" | ||
42 | |||
43 | #include "os/linux/module.h" | ||
44 | #include "os/linux/os_linux.h" | ||
45 | #include "os/linux/ioctl.h" | ||
46 | #include "os/linux/scale.h" | ||
47 | #include "os/linux/driver_common.h" | ||
48 | #include "os/linux/platform_gk20a.h" | ||
49 | |||
50 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> | ||
51 | |||
52 | struct vgpu_priv_data *vgpu_get_priv_data(struct gk20a *g) | ||
53 | { | ||
54 | struct gk20a_platform *plat = gk20a_get_platform(dev_from_gk20a(g)); | ||
55 | |||
56 | return (struct vgpu_priv_data *)plat->vgpu_priv; | ||
57 | } | ||
58 | |||
59 | static void vgpu_remove_support(struct gk20a *g) | ||
60 | { | ||
61 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
62 | |||
63 | vgpu_remove_support_common(g); | ||
64 | |||
65 | /* free mappings to registers, etc*/ | ||
66 | |||
67 | if (l->bar1) { | ||
68 | iounmap(l->bar1); | ||
69 | l->bar1 = NULL; | ||
70 | } | ||
71 | } | ||
72 | |||
73 | static void vgpu_init_vars(struct gk20a *g, struct gk20a_platform *platform) | ||
74 | { | ||
75 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
76 | |||
77 | nvgpu_mutex_init(&g->poweron_lock); | ||
78 | nvgpu_mutex_init(&g->poweroff_lock); | ||
79 | nvgpu_mutex_init(&g->ctxsw_disable_lock); | ||
80 | l->regs_saved = l->regs; | ||
81 | l->bar1_saved = l->bar1; | ||
82 | |||
83 | g->aggressive_sync_destroy = platform->aggressive_sync_destroy; | ||
84 | g->aggressive_sync_destroy_thresh = platform->aggressive_sync_destroy_thresh; | ||
85 | g->has_syncpoints = platform->has_syncpoints; | ||
86 | g->ptimer_src_freq = platform->ptimer_src_freq; | ||
87 | g->can_railgate = platform->can_railgate_init; | ||
88 | g->railgate_delay = platform->railgate_delay_init; | ||
89 | |||
90 | __nvgpu_set_enabled(g, NVGPU_MM_UNIFY_ADDRESS_SPACES, | ||
91 | platform->unify_address_spaces); | ||
92 | } | ||
93 | |||
94 | static int vgpu_init_support(struct platform_device *pdev) | ||
95 | { | ||
96 | struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
97 | struct gk20a *g = get_gk20a(&pdev->dev); | ||
98 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
99 | void __iomem *regs; | ||
100 | int err = 0; | ||
101 | |||
102 | if (!r) { | ||
103 | nvgpu_err(g, "failed to get gk20a bar1"); | ||
104 | err = -ENXIO; | ||
105 | goto fail; | ||
106 | } | ||
107 | |||
108 | if (r->name && !strcmp(r->name, "/vgpu")) { | ||
109 | regs = devm_ioremap_resource(&pdev->dev, r); | ||
110 | if (IS_ERR(regs)) { | ||
111 | nvgpu_err(g, "failed to remap gk20a bar1"); | ||
112 | err = PTR_ERR(regs); | ||
113 | goto fail; | ||
114 | } | ||
115 | l->bar1 = regs; | ||
116 | l->bar1_mem = r; | ||
117 | } | ||
118 | |||
119 | nvgpu_mutex_init(&g->dbg_sessions_lock); | ||
120 | nvgpu_mutex_init(&g->client_lock); | ||
121 | |||
122 | nvgpu_init_list_node(&g->profiler_objects); | ||
123 | |||
124 | g->dbg_regops_tmp_buf = nvgpu_kzalloc(g, SZ_4K); | ||
125 | if (!g->dbg_regops_tmp_buf) { | ||
126 | nvgpu_err(g, "couldn't allocate regops tmp buf"); | ||
127 | return -ENOMEM; | ||
128 | } | ||
129 | g->dbg_regops_tmp_buf_ops = | ||
130 | SZ_4K / sizeof(g->dbg_regops_tmp_buf[0]); | ||
131 | |||
132 | g->remove_support = vgpu_remove_support; | ||
133 | return 0; | ||
134 | |||
135 | fail: | ||
136 | vgpu_remove_support(g); | ||
137 | return err; | ||
138 | } | ||
139 | |||
140 | int vgpu_pm_prepare_poweroff(struct device *dev) | ||
141 | { | ||
142 | struct gk20a *g = get_gk20a(dev); | ||
143 | int ret = 0; | ||
144 | |||
145 | nvgpu_log_fn(g, " "); | ||
146 | |||
147 | if (!g->power_on) | ||
148 | return 0; | ||
149 | |||
150 | ret = gk20a_channel_suspend(g); | ||
151 | if (ret) | ||
152 | return ret; | ||
153 | |||
154 | g->power_on = false; | ||
155 | |||
156 | return ret; | ||
157 | } | ||
158 | |||
159 | int vgpu_pm_finalize_poweron(struct device *dev) | ||
160 | { | ||
161 | struct gk20a *g = get_gk20a(dev); | ||
162 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
163 | int err; | ||
164 | |||
165 | nvgpu_log_fn(g, " "); | ||
166 | |||
167 | if (g->power_on) | ||
168 | return 0; | ||
169 | |||
170 | g->power_on = true; | ||
171 | |||
172 | vgpu_detect_chip(g); | ||
173 | err = vgpu_init_hal(g); | ||
174 | if (err) | ||
175 | goto done; | ||
176 | |||
177 | if (g->ops.ltc.init_fs_state) | ||
178 | g->ops.ltc.init_fs_state(g); | ||
179 | |||
180 | err = nvgpu_init_ltc_support(g); | ||
181 | if (err) { | ||
182 | nvgpu_err(g, "failed to init ltc"); | ||
183 | goto done; | ||
184 | } | ||
185 | |||
186 | err = vgpu_init_mm_support(g); | ||
187 | if (err) { | ||
188 | nvgpu_err(g, "failed to init gk20a mm"); | ||
189 | goto done; | ||
190 | } | ||
191 | |||
192 | err = vgpu_init_fifo_support(g); | ||
193 | if (err) { | ||
194 | nvgpu_err(g, "failed to init gk20a fifo"); | ||
195 | goto done; | ||
196 | } | ||
197 | |||
198 | err = vgpu_init_gr_support(g); | ||
199 | if (err) { | ||
200 | nvgpu_err(g, "failed to init gk20a gr"); | ||
201 | goto done; | ||
202 | } | ||
203 | |||
204 | err = g->ops.chip_init_gpu_characteristics(g); | ||
205 | if (err) { | ||
206 | nvgpu_err(g, "failed to init gk20a gpu characteristics"); | ||
207 | goto done; | ||
208 | } | ||
209 | |||
210 | err = nvgpu_finalize_poweron_linux(l); | ||
211 | if (err) | ||
212 | goto done; | ||
213 | |||
214 | #ifdef CONFIG_GK20A_CTXSW_TRACE | ||
215 | gk20a_ctxsw_trace_init(g); | ||
216 | #endif | ||
217 | gk20a_sched_ctrl_init(g); | ||
218 | gk20a_channel_resume(g); | ||
219 | |||
220 | g->sw_ready = true; | ||
221 | |||
222 | done: | ||
223 | return err; | ||
224 | } | ||
225 | |||
226 | static int vgpu_qos_notify(struct notifier_block *nb, | ||
227 | unsigned long n, void *data) | ||
228 | { | ||
229 | struct gk20a_scale_profile *profile = | ||
230 | container_of(nb, struct gk20a_scale_profile, | ||
231 | qos_notify_block); | ||
232 | struct gk20a *g = get_gk20a(profile->dev); | ||
233 | u32 max_freq; | ||
234 | int err; | ||
235 | |||
236 | nvgpu_log_fn(g, " "); | ||
237 | |||
238 | max_freq = (u32)pm_qos_read_max_bound(PM_QOS_GPU_FREQ_BOUNDS); | ||
239 | err = vgpu_clk_cap_rate(profile->dev, max_freq); | ||
240 | if (err) | ||
241 | nvgpu_err(g, "%s failed, err=%d", __func__, err); | ||
242 | |||
243 | return NOTIFY_OK; /* need notify call further */ | ||
244 | } | ||
245 | |||
246 | static int vgpu_pm_qos_init(struct device *dev) | ||
247 | { | ||
248 | struct gk20a *g = get_gk20a(dev); | ||
249 | struct gk20a_scale_profile *profile = g->scale_profile; | ||
250 | |||
251 | if (IS_ENABLED(CONFIG_GK20A_DEVFREQ)) { | ||
252 | if (!profile) | ||
253 | return -EINVAL; | ||
254 | } else { | ||
255 | profile = nvgpu_kzalloc(g, sizeof(*profile)); | ||
256 | if (!profile) | ||
257 | return -ENOMEM; | ||
258 | g->scale_profile = profile; | ||
259 | } | ||
260 | |||
261 | profile->dev = dev; | ||
262 | profile->qos_notify_block.notifier_call = vgpu_qos_notify; | ||
263 | pm_qos_add_max_notifier(PM_QOS_GPU_FREQ_BOUNDS, | ||
264 | &profile->qos_notify_block); | ||
265 | return 0; | ||
266 | } | ||
267 | |||
268 | static void vgpu_pm_qos_remove(struct device *dev) | ||
269 | { | ||
270 | struct gk20a *g = get_gk20a(dev); | ||
271 | |||
272 | pm_qos_remove_max_notifier(PM_QOS_GPU_FREQ_BOUNDS, | ||
273 | &g->scale_profile->qos_notify_block); | ||
274 | nvgpu_kfree(g, g->scale_profile); | ||
275 | g->scale_profile = NULL; | ||
276 | } | ||
277 | |||
278 | static int vgpu_pm_init(struct device *dev) | ||
279 | { | ||
280 | struct gk20a *g = get_gk20a(dev); | ||
281 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
282 | unsigned long *freqs; | ||
283 | int num_freqs; | ||
284 | int err = 0; | ||
285 | |||
286 | nvgpu_log_fn(g, " "); | ||
287 | |||
288 | if (nvgpu_platform_is_simulation(g)) | ||
289 | return 0; | ||
290 | |||
291 | __pm_runtime_disable(dev, false); | ||
292 | |||
293 | if (IS_ENABLED(CONFIG_GK20A_DEVFREQ)) | ||
294 | gk20a_scale_init(dev); | ||
295 | |||
296 | if (l->devfreq) { | ||
297 | /* set min/max frequency based on frequency table */ | ||
298 | err = vgpu_clk_get_freqs(dev, &freqs, &num_freqs); | ||
299 | if (err) | ||
300 | return err; | ||
301 | |||
302 | if (num_freqs < 1) | ||
303 | return -EINVAL; | ||
304 | |||
305 | l->devfreq->min_freq = freqs[0]; | ||
306 | l->devfreq->max_freq = freqs[num_freqs - 1]; | ||
307 | } | ||
308 | |||
309 | err = vgpu_pm_qos_init(dev); | ||
310 | if (err) | ||
311 | return err; | ||
312 | |||
313 | return err; | ||
314 | } | ||
315 | |||
316 | int vgpu_probe(struct platform_device *pdev) | ||
317 | { | ||
318 | struct nvgpu_os_linux *l; | ||
319 | struct gk20a *gk20a; | ||
320 | int err; | ||
321 | struct device *dev = &pdev->dev; | ||
322 | struct gk20a_platform *platform = gk20a_get_platform(dev); | ||
323 | struct vgpu_priv_data *priv; | ||
324 | |||
325 | if (!platform) { | ||
326 | dev_err(dev, "no platform data\n"); | ||
327 | return -ENODATA; | ||
328 | } | ||
329 | |||
330 | l = kzalloc(sizeof(*l), GFP_KERNEL); | ||
331 | if (!l) { | ||
332 | dev_err(dev, "couldn't allocate gk20a support"); | ||
333 | return -ENOMEM; | ||
334 | } | ||
335 | gk20a = &l->g; | ||
336 | |||
337 | nvgpu_log_fn(gk20a, " "); | ||
338 | |||
339 | nvgpu_init_gk20a(gk20a); | ||
340 | |||
341 | nvgpu_kmem_init(gk20a); | ||
342 | |||
343 | err = nvgpu_init_enabled_flags(gk20a); | ||
344 | if (err) { | ||
345 | kfree(gk20a); | ||
346 | return err; | ||
347 | } | ||
348 | |||
349 | l->dev = dev; | ||
350 | if (tegra_platform_is_vdk()) | ||
351 | __nvgpu_set_enabled(gk20a, NVGPU_IS_FMODEL, true); | ||
352 | |||
353 | gk20a->is_virtual = true; | ||
354 | |||
355 | priv = nvgpu_kzalloc(gk20a, sizeof(*priv)); | ||
356 | if (!priv) { | ||
357 | kfree(gk20a); | ||
358 | return -ENOMEM; | ||
359 | } | ||
360 | |||
361 | platform->g = gk20a; | ||
362 | platform->vgpu_priv = priv; | ||
363 | |||
364 | err = gk20a_user_init(dev, INTERFACE_NAME, &nvgpu_class); | ||
365 | if (err) | ||
366 | return err; | ||
367 | |||
368 | vgpu_init_support(pdev); | ||
369 | |||
370 | vgpu_init_vars(gk20a, platform); | ||
371 | |||
372 | init_rwsem(&l->busy_lock); | ||
373 | |||
374 | nvgpu_spinlock_init(&gk20a->mc_enable_lock); | ||
375 | |||
376 | gk20a->ch_wdt_timeout_ms = platform->ch_wdt_timeout_ms; | ||
377 | |||
378 | /* Initialize the platform interface. */ | ||
379 | err = platform->probe(dev); | ||
380 | if (err) { | ||
381 | if (err == -EPROBE_DEFER) | ||
382 | nvgpu_info(gk20a, "platform probe failed"); | ||
383 | else | ||
384 | nvgpu_err(gk20a, "platform probe failed"); | ||
385 | return err; | ||
386 | } | ||
387 | |||
388 | if (platform->late_probe) { | ||
389 | err = platform->late_probe(dev); | ||
390 | if (err) { | ||
391 | nvgpu_err(gk20a, "late probe failed"); | ||
392 | return err; | ||
393 | } | ||
394 | } | ||
395 | |||
396 | err = vgpu_comm_init(gk20a); | ||
397 | if (err) { | ||
398 | nvgpu_err(gk20a, "failed to init comm interface"); | ||
399 | return -ENOSYS; | ||
400 | } | ||
401 | |||
402 | priv->virt_handle = vgpu_connect(); | ||
403 | if (!priv->virt_handle) { | ||
404 | nvgpu_err(gk20a, "failed to connect to server node"); | ||
405 | vgpu_comm_deinit(); | ||
406 | return -ENOSYS; | ||
407 | } | ||
408 | |||
409 | err = vgpu_get_constants(gk20a); | ||
410 | if (err) { | ||
411 | vgpu_comm_deinit(); | ||
412 | return err; | ||
413 | } | ||
414 | |||
415 | err = vgpu_pm_init(dev); | ||
416 | if (err) { | ||
417 | nvgpu_err(gk20a, "pm init failed"); | ||
418 | return err; | ||
419 | } | ||
420 | |||
421 | err = nvgpu_thread_create(&priv->intr_handler, gk20a, | ||
422 | vgpu_intr_thread, "gk20a"); | ||
423 | if (err) | ||
424 | return err; | ||
425 | |||
426 | gk20a_debug_init(gk20a, "gpu.0"); | ||
427 | |||
428 | /* Set DMA parameters to allow larger sgt lists */ | ||
429 | dev->dma_parms = &l->dma_parms; | ||
430 | dma_set_max_seg_size(dev, UINT_MAX); | ||
431 | |||
432 | gk20a->gr_idle_timeout_default = NVGPU_DEFAULT_GR_IDLE_TIMEOUT; | ||
433 | gk20a->timeouts_disabled_by_user = false; | ||
434 | nvgpu_atomic_set(&gk20a->timeouts_disabled_refcount, 0); | ||
435 | |||
436 | vgpu_create_sysfs(dev); | ||
437 | gk20a_init_gr(gk20a); | ||
438 | |||
439 | nvgpu_log_info(gk20a, "total ram pages : %lu", totalram_pages); | ||
440 | gk20a->gr.max_comptag_mem = totalram_pages | ||
441 | >> (10 - (PAGE_SHIFT - 10)); | ||
442 | |||
443 | nvgpu_ref_init(&gk20a->refcount); | ||
444 | |||
445 | return 0; | ||
446 | } | ||
447 | |||
448 | int vgpu_remove(struct platform_device *pdev) | ||
449 | { | ||
450 | struct device *dev = &pdev->dev; | ||
451 | struct gk20a *g = get_gk20a(dev); | ||
452 | |||
453 | nvgpu_log_fn(g, " "); | ||
454 | |||
455 | vgpu_pm_qos_remove(dev); | ||
456 | if (g->remove_support) | ||
457 | g->remove_support(g); | ||
458 | |||
459 | vgpu_comm_deinit(); | ||
460 | gk20a_sched_ctrl_cleanup(g); | ||
461 | gk20a_user_deinit(dev, &nvgpu_class); | ||
462 | vgpu_remove_sysfs(dev); | ||
463 | gk20a_get_platform(dev)->g = NULL; | ||
464 | gk20a_put(g); | ||
465 | |||
466 | return 0; | ||
467 | } | ||
468 | |||
469 | bool vgpu_is_reduced_bar1(struct gk20a *g) | ||
470 | { | ||
471 | struct fifo_gk20a *f = &g->fifo; | ||
472 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | ||
473 | |||
474 | return resource_size(l->bar1_mem) == (resource_size_t)f->userd.size; | ||
475 | } | ||