diff options
Diffstat (limited to 'drivers/gpu/nvgpu/nvgpu_common.c')
-rw-r--r-- | drivers/gpu/nvgpu/nvgpu_common.c | 154 |
1 files changed, 154 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/nvgpu_common.c b/drivers/gpu/nvgpu/nvgpu_common.c new file mode 100644 index 00000000..bdc07e50 --- /dev/null +++ b/drivers/gpu/nvgpu/nvgpu_common.c | |||
@@ -0,0 +1,154 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | |||
17 | #include <linux/dma-mapping.h> | ||
18 | |||
19 | #include "gk20a/gk20a_scale.h" | ||
20 | #include "gk20a/gk20a.h" | ||
21 | |||
22 | #define EMC3D_DEFAULT_RATIO 750 | ||
23 | |||
24 | static void nvgpu_init_vars(struct gk20a *g) | ||
25 | { | ||
26 | struct gk20a_platform *platform = dev_get_drvdata(g->dev); | ||
27 | |||
28 | init_waitqueue_head(&g->sw_irq_stall_last_handled_wq); | ||
29 | init_waitqueue_head(&g->sw_irq_nonstall_last_handled_wq); | ||
30 | gk20a_init_gr(g); | ||
31 | |||
32 | init_rwsem(&g->busy_lock); | ||
33 | |||
34 | spin_lock_init(&g->mc_enable_lock); | ||
35 | |||
36 | mutex_init(&platform->railgate_lock); | ||
37 | mutex_init(&g->dbg_sessions_lock); | ||
38 | mutex_init(&g->client_lock); | ||
39 | mutex_init(&g->ch_wdt_lock); | ||
40 | mutex_init(&g->poweroff_lock); | ||
41 | |||
42 | g->regs_saved = g->regs; | ||
43 | g->bar1_saved = g->bar1; | ||
44 | |||
45 | g->emc3d_ratio = EMC3D_DEFAULT_RATIO; | ||
46 | |||
47 | /* Set DMA parameters to allow larger sgt lists */ | ||
48 | g->dev->dma_parms = &g->dma_parms; | ||
49 | dma_set_max_seg_size(g->dev, UINT_MAX); | ||
50 | |||
51 | } | ||
52 | |||
53 | static void nvgpu_init_timeout(struct gk20a *g) | ||
54 | { | ||
55 | g->gr_idle_timeout_default = CONFIG_GK20A_DEFAULT_TIMEOUT; | ||
56 | if (tegra_platform_is_silicon()) | ||
57 | g->timeouts_enabled = true; | ||
58 | } | ||
59 | |||
60 | static void nvgpu_init_timeslice(struct gk20a *g) | ||
61 | { | ||
62 | g->runlist_interleave = true; | ||
63 | |||
64 | g->timeslice_low_priority_us = 1300; | ||
65 | g->timeslice_medium_priority_us = 2600; | ||
66 | g->timeslice_high_priority_us = 5200; | ||
67 | } | ||
68 | |||
69 | static void nvgpu_init_pm_vars(struct gk20a *g) | ||
70 | { | ||
71 | struct gk20a_platform *platform = dev_get_drvdata(g->dev); | ||
72 | |||
73 | /* | ||
74 | * Set up initial power settings. For non-slicon platforms, disable | ||
75 | * power features and for silicon platforms, read from platform data | ||
76 | */ | ||
77 | g->slcg_enabled = | ||
78 | tegra_platform_is_silicon() ? platform->enable_slcg : false; | ||
79 | g->blcg_enabled = | ||
80 | tegra_platform_is_silicon() ? platform->enable_blcg : false; | ||
81 | g->elcg_enabled = | ||
82 | tegra_platform_is_silicon() ? platform->enable_elcg : false; | ||
83 | g->elpg_enabled = | ||
84 | tegra_platform_is_silicon() ? platform->enable_elpg : false; | ||
85 | g->aelpg_enabled = | ||
86 | tegra_platform_is_silicon() ? platform->enable_aelpg : false; | ||
87 | |||
88 | /* set default values to aelpg parameters */ | ||
89 | g->pmu.aelpg_param[0] = APCTRL_SAMPLING_PERIOD_PG_DEFAULT_US; | ||
90 | g->pmu.aelpg_param[1] = APCTRL_MINIMUM_IDLE_FILTER_DEFAULT_US; | ||
91 | g->pmu.aelpg_param[2] = APCTRL_MINIMUM_TARGET_SAVING_DEFAULT_US; | ||
92 | g->pmu.aelpg_param[3] = APCTRL_POWER_BREAKEVEN_DEFAULT_US; | ||
93 | g->pmu.aelpg_param[4] = APCTRL_CYCLES_PER_SAMPLE_MAX_DEFAULT; | ||
94 | } | ||
95 | |||
96 | static void nvgpu_init_mm_vars(struct gk20a *g) | ||
97 | { | ||
98 | struct gk20a_platform *platform = dev_get_drvdata(g->dev); | ||
99 | |||
100 | g->mm.bypass_smmu = platform->bypass_smmu; | ||
101 | g->mm.disable_bigpage = platform->disable_bigpage; | ||
102 | g->mm.vidmem_is_vidmem = platform->vidmem_is_vidmem; | ||
103 | } | ||
104 | |||
105 | int nvgpu_probe(struct gk20a *g, | ||
106 | const char *debugfs_symlink, | ||
107 | const char *interface_name, | ||
108 | struct class *class) | ||
109 | { | ||
110 | struct gk20a_platform *platform = dev_get_drvdata(g->dev); | ||
111 | int err = 0; | ||
112 | |||
113 | nvgpu_init_vars(g); | ||
114 | nvgpu_init_timeout(g); | ||
115 | nvgpu_init_timeslice(g); | ||
116 | nvgpu_init_pm_vars(g); | ||
117 | |||
118 | err = gk20a_user_init(g->dev, interface_name, class); | ||
119 | if (err) | ||
120 | return err; | ||
121 | |||
122 | /* Initialize the platform interface. */ | ||
123 | err = platform->probe(g->dev); | ||
124 | if (err) { | ||
125 | dev_err(g->dev, "platform probe failed"); | ||
126 | return err; | ||
127 | } | ||
128 | |||
129 | /* Initialise scaling */ | ||
130 | if (IS_ENABLED(CONFIG_GK20A_DEVFREQ)) | ||
131 | gk20a_scale_init(g->dev); | ||
132 | |||
133 | err = gk20a_secure_page_alloc(g->dev); | ||
134 | if (err) | ||
135 | dev_err(g->dev, | ||
136 | "failed to allocate secure buffer %d\n", err); | ||
137 | |||
138 | if (platform->late_probe) { | ||
139 | err = platform->late_probe(g->dev); | ||
140 | if (err) { | ||
141 | dev_err(g->dev, "late probe failed"); | ||
142 | return err; | ||
143 | } | ||
144 | } | ||
145 | |||
146 | nvgpu_init_mm_vars(g); | ||
147 | |||
148 | gk20a_create_sysfs(g->dev); | ||
149 | gk20a_debug_init(g->dev, debugfs_symlink); | ||
150 | |||
151 | g->remove_support = gk20a_remove_support; | ||
152 | |||
153 | return 0; | ||
154 | } | ||