diff options
Diffstat (limited to 'drivers/gpu/nvgpu/lpwr/rppg.c')
-rw-r--r-- | drivers/gpu/nvgpu/lpwr/rppg.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/lpwr/rppg.c b/drivers/gpu/nvgpu/lpwr/rppg.c index e90fd7f9..59948f35 100644 --- a/drivers/gpu/nvgpu/lpwr/rppg.c +++ b/drivers/gpu/nvgpu/lpwr/rppg.c | |||
@@ -68,7 +68,7 @@ static u32 rppg_send_cmd(struct gk20a *g, struct nv_pmu_rppg_cmd *prppg_cmd) | |||
68 | prppg_cmd->stats_reset.ctrl_id; | 68 | prppg_cmd->stats_reset.ctrl_id; |
69 | break; | 69 | break; |
70 | default: | 70 | default: |
71 | gk20a_err(dev_from_gk20a(g), "Inivalid RPPG command %d", | 71 | nvgpu_err(g, "Inivalid RPPG command %d", |
72 | prppg_cmd->cmn.cmd_id); | 72 | prppg_cmd->cmn.cmd_id); |
73 | return -1; | 73 | return -1; |
74 | } | 74 | } |
@@ -76,7 +76,7 @@ static u32 rppg_send_cmd(struct gk20a *g, struct nv_pmu_rppg_cmd *prppg_cmd) | |||
76 | status = gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, | 76 | status = gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, |
77 | pmu_handle_rppg_init_msg, &success, &seq, ~0); | 77 | pmu_handle_rppg_init_msg, &success, &seq, ~0); |
78 | if (status) { | 78 | if (status) { |
79 | gk20a_err(dev_from_gk20a(g), "Unable to submit parameter command %d", | 79 | nvgpu_err(g, "Unable to submit parameter command %d", |
80 | prppg_cmd->cmn.cmd_id); | 80 | prppg_cmd->cmn.cmd_id); |
81 | goto exit; | 81 | goto exit; |
82 | } | 82 | } |
@@ -86,7 +86,7 @@ static u32 rppg_send_cmd(struct gk20a *g, struct nv_pmu_rppg_cmd *prppg_cmd) | |||
86 | &success, 1); | 86 | &success, 1); |
87 | if (success == 0) { | 87 | if (success == 0) { |
88 | status = -EINVAL; | 88 | status = -EINVAL; |
89 | gk20a_err(dev_from_gk20a(g), "Ack for the parameter command %x", | 89 | nvgpu_err(g, "Ack for the parameter command %x", |
90 | prppg_cmd->cmn.cmd_id); | 90 | prppg_cmd->cmn.cmd_id); |
91 | } | 91 | } |
92 | } | 92 | } |
@@ -127,7 +127,7 @@ u32 init_rppg(struct gk20a *g) | |||
127 | 127 | ||
128 | status = rppg_init(g); | 128 | status = rppg_init(g); |
129 | if (status != 0) { | 129 | if (status != 0) { |
130 | gk20a_err(dev_from_gk20a(g), | 130 | nvgpu_err(g, |
131 | "Failed to initialize RPPG in PMU: 0x%08x", status); | 131 | "Failed to initialize RPPG in PMU: 0x%08x", status); |
132 | return status; | 132 | return status; |
133 | } | 133 | } |
@@ -135,7 +135,7 @@ u32 init_rppg(struct gk20a *g) | |||
135 | 135 | ||
136 | status = rppg_ctrl_init(g, NV_PMU_RPPG_CTRL_ID_GR); | 136 | status = rppg_ctrl_init(g, NV_PMU_RPPG_CTRL_ID_GR); |
137 | if (status != 0) { | 137 | if (status != 0) { |
138 | gk20a_err(dev_from_gk20a(g), | 138 | nvgpu_err(g, |
139 | "Failed to initialize RPPG_CTRL: GR in PMU: 0x%08x", | 139 | "Failed to initialize RPPG_CTRL: GR in PMU: 0x%08x", |
140 | status); | 140 | status); |
141 | return status; | 141 | return status; |
@@ -143,7 +143,7 @@ u32 init_rppg(struct gk20a *g) | |||
143 | 143 | ||
144 | status = rppg_ctrl_init(g, NV_PMU_RPPG_CTRL_ID_MS); | 144 | status = rppg_ctrl_init(g, NV_PMU_RPPG_CTRL_ID_MS); |
145 | if (status != 0) { | 145 | if (status != 0) { |
146 | gk20a_err(dev_from_gk20a(g), | 146 | nvgpu_err(g, |
147 | "Failed to initialize RPPG_CTRL: MS in PMU: 0x%08x", | 147 | "Failed to initialize RPPG_CTRL: MS in PMU: 0x%08x", |
148 | status); | 148 | status); |
149 | return status; | 149 | return status; |