6 files changed, 27 insertions, 5 deletions

diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
index d0f51055..593b553c 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
@@ -264,6 +264,7 @@ struct gpu_ops {
                                 struct gk20a_ctxsw_ucode_segments *segments,
                                 u32 reg_offset);
                 int (*load_ctxsw_ucode)(struct gk20a *g);
+                u32 (*get_gpc_mask)(struct gk20a *g);
                 u32 (*get_gpc_tpc_mask)(struct gk20a *g, u32 gpc_index);
                 void (*set_gpc_tpc_mask)(struct gk20a *g, u32 gpc_index);
                 int (*alloc_obj_ctx)(struct channel_gk20a  *c,
@@ -1270,6 +1271,7 @@ struct gpu_ops {
                 u32 (*fuse_status_opt_fbio)(struct gk20a *g);
                 u32 (*fuse_status_opt_fbp)(struct gk20a *g);
                 u32 (*fuse_status_opt_rop_l2_fbp)(struct gk20a *g, u32 fbp);
+                u32 (*fuse_status_opt_gpc)(struct gk20a *g);
                 u32 (*fuse_status_opt_tpc_gpc)(struct gk20a *g, u32 gpc);
                 void (*fuse_ctrl_opt_tpc_gpc)(struct gk20a *g, u32 gpc, u32 val);
                 u32 (*fuse_opt_sec_debug_en)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_fuse_gm20b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_fuse_gm20b.h
index 99b4b3f3..d97eb7d8 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_fuse_gm20b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_fuse_gm20b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -56,6 +56,10 @@
 #ifndef _hw_fuse_gm20b_h_
 #define _hw_fuse_gm20b_h_
 
+static inline u32 fuse_status_opt_gpc_r(void)
+{
+        return 0x00021c1cU;
+}
 static inline u32 fuse_status_opt_tpc_gpc_r(u32 i)
 {
         return 0x00021c38U + i*4U;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_fuse_gp106.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_fuse_gp106.h
index 7d1fb075..bfb19b9b 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_fuse_gp106.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_fuse_gp106.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -56,6 +56,10 @@
 #ifndef _hw_fuse_gp106_h_
 #define _hw_fuse_gp106_h_
 
+static inline u32 fuse_status_opt_gpc_r(void)
+{
+        return 0x00021c1cU;
+}
 static inline u32 fuse_status_opt_tpc_gpc_r(u32 i)
 {
         return 0x00021c38U + i*4U;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fuse_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fuse_gp10b.h
index 29107fb8..521dcfe2 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fuse_gp10b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fuse_gp10b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -56,6 +56,10 @@
 #ifndef _hw_fuse_gp10b_h_
 #define _hw_fuse_gp10b_h_
 
+static inline u32 fuse_status_opt_gpc_r(void)
+{
+        return 0x00021c1cU;
+}
 static inline u32 fuse_status_opt_tpc_gpc_r(u32 i)
 {
         return 0x00021c38U + i*4U;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_fuse_gv100.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_fuse_gv100.h
index f7eacd29..48194ea9 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_fuse_gv100.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_fuse_gv100.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -56,6 +56,10 @@
 #ifndef _hw_fuse_gv100_h_
 #define _hw_fuse_gv100_h_
 
+static inline u32 fuse_status_opt_gpc_r(void)
+{
+        return 0x00021c1cU;
+}
 static inline u32 fuse_status_opt_tpc_gpc_r(u32 i)
 {
         return 0x00021c38U + i*4U;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fuse_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fuse_gv11b.h
index f8d9b196..9395da3f 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fuse_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fuse_gv11b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -56,6 +56,10 @@
 #ifndef _hw_fuse_gv11b_h_
 #define _hw_fuse_gv11b_h_
 
+static inline u32 fuse_status_opt_gpc_r(void)
+{
+        return 0x00021c1cU;
+}
 static inline u32 fuse_status_opt_tpc_gpc_r(u32 i)
 {
         return 0x00021c38U + i*4U;