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-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/enabled.h7
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/gmmu.h5
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h4
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/vm.h3
4 files changed, 12 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/enabled.h b/drivers/gpu/nvgpu/include/nvgpu/enabled.h
index 76f0f2bd..fc7bab90 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/enabled.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/enabled.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -178,10 +178,13 @@ struct gk20a;
178/* NVGPU_GPU_IOCTL_GET_GPU_LOAD is available */ 178/* NVGPU_GPU_IOCTL_GET_GPU_LOAD is available */
179#define NVGPU_SUPPORT_GET_GPU_LOAD 70 179#define NVGPU_SUPPORT_GET_GPU_LOAD 70
180 180
181/* PLATFORM_ATOMIC support */
182#define NVGPU_SUPPORT_PLATFORM_ATOMIC 71
183
181/* 184/*
182 * Must be greater than the largest bit offset in the above list. 185 * Must be greater than the largest bit offset in the above list.
183 */ 186 */
184#define NVGPU_MAX_ENABLED_BITS 71 187#define NVGPU_MAX_ENABLED_BITS 72
185 188
186/** 189/**
187 * nvgpu_is_enabled - Check if the passed flag is enabled. 190 * nvgpu_is_enabled - Check if the passed flag is enabled.
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
index a70015f8..66cb5218 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -155,6 +155,7 @@ struct nvgpu_gmmu_pd {
155 * valid: Set if the PTE should be marked valid. 155 * valid: Set if the PTE should be marked valid.
156 * aperture: VIDMEM or SYSMEM. 156 * aperture: VIDMEM or SYSMEM.
157 * debug: When set print debugging info. 157 * debug: When set print debugging info.
158 * platform_atomic: True if platform_atomic flag is valid.
158 * 159 *
159 * These fields are dynamically updated as necessary during the map: 160 * These fields are dynamically updated as necessary during the map:
160 * 161 *
@@ -173,8 +174,8 @@ struct nvgpu_gmmu_attrs {
173 bool valid; 174 bool valid;
174 enum nvgpu_aperture aperture; 175 enum nvgpu_aperture aperture;
175 bool debug; 176 bool debug;
176
177 bool l3_alloc; 177 bool l3_alloc;
178 bool platform_atomic;
178}; 179};
179 180
180struct gk20a_mmu_level { 181struct gk20a_mmu_level {
diff --git a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h
index 8e62a1d6..4e84f2af 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -349,7 +349,7 @@ void nvgpu_memset(struct gk20a *g, struct nvgpu_mem *mem, u32 offset,
349u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem); 349u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem);
350u64 nvgpu_mem_get_phys_addr(struct gk20a *g, struct nvgpu_mem *mem); 350u64 nvgpu_mem_get_phys_addr(struct gk20a *g, struct nvgpu_mem *mem);
351 351
352u32 nvgpu_aperture_mask_coh(struct gk20a *g, enum nvgpu_aperture aperture, 352u32 nvgpu_aperture_mask_raw(struct gk20a *g, enum nvgpu_aperture aperture,
353 u32 sysmem_mask, u32 sysmem_coh_mask, u32 vidmem_mask); 353 u32 sysmem_mask, u32 sysmem_coh_mask, u32 vidmem_mask);
354u32 nvgpu_aperture_mask(struct gk20a *g, struct nvgpu_mem *mem, 354u32 nvgpu_aperture_mask(struct gk20a *g, struct nvgpu_mem *mem,
355 u32 sysmem_mask, u32 sysmem_coh_mask, u32 vidmem_mask); 355 u32 sysmem_mask, u32 sysmem_coh_mask, u32 vidmem_mask);
diff --git a/drivers/gpu/nvgpu/include/nvgpu/vm.h b/drivers/gpu/nvgpu/include/nvgpu/vm.h
index 66749717..3867c745 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/vm.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/vm.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -213,6 +213,7 @@ struct vm_gk20a {
213#define NVGPU_VM_MAP_UNMAPPED_PTE BIT32(3) 213#define NVGPU_VM_MAP_UNMAPPED_PTE BIT32(3)
214#define NVGPU_VM_MAP_DIRECT_KIND_CTRL BIT32(4) 214#define NVGPU_VM_MAP_DIRECT_KIND_CTRL BIT32(4)
215#define NVGPU_VM_MAP_L3_ALLOC BIT32(5) 215#define NVGPU_VM_MAP_L3_ALLOC BIT32(5)
216#define NVGPU_VM_MAP_PLATFORM_ATOMIC BIT32(6)
216 217
217#define NVGPU_KIND_INVALID -1 218#define NVGPU_KIND_INVALID -1
218 219