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-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/clk_arb.h105
1 files changed, 102 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h
index c13144ee..a2f8135e 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -24,10 +24,95 @@
24#define __NVGPU_CLK_ARB_H__ 24#define __NVGPU_CLK_ARB_H__
25 25
26#include <nvgpu/types.h> 26#include <nvgpu/types.h>
27 27#include <nvgpu/bitops.h>
28struct gk20a; 28#include <nvgpu/lock.h>
29#include <nvgpu/kmem.h>
30#include <nvgpu/atomic.h>
31#include <nvgpu/bug.h>
32#include <nvgpu/kref.h>
33#include <nvgpu/log.h>
34#include <nvgpu/barrier.h>
35#include <nvgpu/cond.h>
36
37#include "gk20a/gk20a.h"
38#include "clk/clk.h"
39#include "pstate/pstate.h"
40#include "lpwr/lpwr.h"
41#include "volt/volt.h"
42
43#define MAX_F_POINTS 256
44#define DEFAULT_EVENT_NUMBER 32
45
46struct nvgpu_clk_dev;
47struct nvgpu_clk_arb_target;
48struct nvgpu_clk_notification_queue;
29struct nvgpu_clk_session; 49struct nvgpu_clk_session;
30 50
51#define VF_POINT_INVALID_PSTATE ~0U
52#define VF_POINT_SET_PSTATE_SUPPORTED(a, b) ((a)->pstates |= (1UL << (b)))
53#define VF_POINT_GET_PSTATE(a) (((a)->pstates) ?\
54 __fls((a)->pstates) :\
55 VF_POINT_INVALID_PSTATE)
56#define VF_POINT_COMMON_PSTATE(a, b) (((a)->pstates & (b)->pstates) ?\
57 __fls((a)->pstates & (b)->pstates) :\
58 VF_POINT_INVALID_PSTATE)
59
60/* Local Alarms */
61#define EVENT(alarm) (0x1UL << NVGPU_GPU_EVENT_##alarm)
62
63#define LOCAL_ALARM_MASK (EVENT(ALARM_LOCAL_TARGET_VF_NOT_POSSIBLE) | \
64 EVENT(VF_UPDATE))
65
66#define _WRAPGTEQ(a, b) ((a-b) > 0)
67
68struct nvgpu_clk_notification {
69 u32 notification;
70 u64 timestamp;
71};
72
73struct nvgpu_clk_notification_queue {
74 u32 size;
75 nvgpu_atomic_t head;
76 nvgpu_atomic_t tail;
77 struct nvgpu_clk_notification *notifications;
78};
79
80struct nvgpu_clk_vf_point {
81 u16 pstates;
82 union {
83 struct {
84 u16 gpc_mhz;
85 u16 sys_mhz;
86 u16 xbar_mhz;
87 };
88 u16 mem_mhz;
89 };
90 u32 uvolt;
91 u32 uvolt_sram;
92};
93
94struct nvgpu_clk_vf_table {
95 u32 mclk_num_points;
96 struct nvgpu_clk_vf_point *mclk_points;
97 u32 gpc2clk_num_points;
98 struct nvgpu_clk_vf_point *gpc2clk_points;
99};
100#ifdef CONFIG_DEBUG_FS
101struct nvgpu_clk_arb_debug {
102 s64 switch_max;
103 s64 switch_min;
104 u64 switch_num;
105 s64 switch_avg;
106 s64 switch_std;
107};
108#endif
109
110struct nvgpu_clk_arb_target {
111 u16 mclk;
112 u16 gpc2clk;
113 u32 pstate;
114};
115
31int nvgpu_clk_arb_init_arbiter(struct gk20a *g); 116int nvgpu_clk_arb_init_arbiter(struct gk20a *g);
32 117
33int nvgpu_clk_arb_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, 118int nvgpu_clk_arb_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
@@ -80,5 +165,19 @@ void nvgpu_clk_arb_pstate_change_lock(struct gk20a *g, bool lock);
80void nvgpu_clk_arb_send_thermal_alarm(struct gk20a *g); 165void nvgpu_clk_arb_send_thermal_alarm(struct gk20a *g);
81 166
82void nvgpu_clk_arb_schedule_alarm(struct gk20a *g, u32 alarm); 167void nvgpu_clk_arb_schedule_alarm(struct gk20a *g, u32 alarm);
168
169void nvgpu_clk_arb_free_session(struct nvgpu_ref *refcount);
170
171void nvgpu_clk_arb_free_fd(struct nvgpu_ref *refcount);
172
173int nvgpu_clk_notification_queue_alloc(struct gk20a *g,
174 struct nvgpu_clk_notification_queue *queue,
175 size_t events_number);
176
177void nvgpu_clk_notification_queue_free(struct gk20a *g,
178 struct nvgpu_clk_notification_queue *queue);
179#ifdef CONFIG_DEBUG_FS
180int nvgpu_clk_arb_debugfs_init(struct gk20a *g);
181#endif
83#endif /* __NVGPU_CLK_ARB_H__ */ 182#endif /* __NVGPU_CLK_ARB_H__ */
84 183