2 files changed, 62 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h
index 86bdaf28..fe35bb71 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -60,6 +60,22 @@ static inline u32 fb_fbhub_num_active_ltcs_r(void)
 {
         return 0x00100800U;
 }
+static inline u32 fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_m(void)
+{
+        return U32(0x1U) << 25U;
+}
+static inline u32 fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_use_rmw_f(void)
+{
+        return 0x2000000U;
+}
+static inline u32 fb_fbhub_num_active_ltcs_hub_sys_ncoh_atomic_mode_m(void)
+{
+        return U32(0x1U) << 26U;
+}
+static inline u32 fb_fbhub_num_active_ltcs_hub_sys_ncoh_atomic_mode_use_read_f(void)
+{
+        return 0x0U;
+}
 static inline u32 fb_mmu_ctrl_r(void)
 {
         return 0x00100c80U;
@@ -76,6 +92,42 @@ static inline u32 fb_mmu_ctrl_pri_fifo_space_v(u32 r)
 {
         return (r >> 16U) & 0xffU;
 }
+static inline u32 fb_mmu_ctrl_atomic_capability_mode_m(void)
+{
+        return U32(0x3U) << 24U;
+}
+static inline u32 fb_mmu_ctrl_atomic_capability_mode_l2_f(void)
+{
+        return 0x0U;
+}
+static inline u32 fb_mmu_ctrl_atomic_capability_mode_rmw_f(void)
+{
+        return 0x2000000U;
+}
+static inline u32 fb_mmu_ctrl_atomic_capability_sys_ncoh_mode_m(void)
+{
+        return U32(0x1U) << 27U;
+}
+static inline u32 fb_mmu_ctrl_atomic_capability_sys_ncoh_mode_l2_f(void)
+{
+        return 0x0U;
+}
+static inline u32 fb_hshub_num_active_ltcs_r(void)
+{
+        return 0x001fbc20U;
+}
+static inline u32 fb_hshub_num_active_ltcs_hub_sys_atomic_mode_m(void)
+{
+        return U32(0x1U) << 25U;
+}
+static inline u32 fb_hshub_num_active_ltcs_hub_sys_atomic_mode_use_read_f(void)
+{
+        return 0x0U;
+}
+static inline u32 fb_hshub_num_active_ltcs_hub_sys_atomic_mode_use_rmw_f(void)
+{
+        return 0x2000000U;
+}
 static inline u32 fb_priv_mmu_phy_secure_r(void)
 {
         return 0x00100ce4U;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
index 36a7ebf5..01dc99d5 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -4976,6 +4976,14 @@ static inline u32 gr_gpcs_pri_mmu_ctrl_mmu_disable_m(void)
 {
         return 0x1U << 31U;
 }
+static inline u32 gr_gpcs_pri_mmu_ctrl_atomic_capability_mode_m(void)
+{
+        return U32(0x3U) << 24U;
+}
+static inline u32 gr_gpcs_pri_mmu_ctrl_atomic_capability_sys_ncoh_mode_m(void)
+{
+        return U32(0x1U) << 27U;
+}
 static inline u32 gr_gpcs_pri_mmu_pm_unit_mask_r(void)
 {
         return 0x00418890U;