2 files changed, 8 insertions, 5 deletions

diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h
index 2dd511de..71684f6c 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h
@@ -107,12 +107,13 @@ struct pmu_init_msg_pmu_v1 {
         u16 sw_managed_area_size;
 };
 
+#define PMU_QUEUE_COUNT_FOR_V5 4
 #define PMU_QUEUE_COUNT_FOR_V4 5
 #define PMU_QUEUE_COUNT_FOR_V3 3
 #define PMU_QUEUE_HPQ_IDX_FOR_V3 0
 #define PMU_QUEUE_LPQ_IDX_FOR_V3 1
 #define PMU_QUEUE_MSG_IDX_FOR_V3 2
-#define PMU_QUEUE_MSG_IDX_FOR_V4 4
+#define PMU_QUEUE_MSG_IDX_FOR_V5 3
 struct pmu_init_msg_pmu_v3 {
         u8 msg_type;
         u8  queue_index[PMU_QUEUE_COUNT_FOR_V3];
@@ -144,8 +145,8 @@ struct pmu_init_msg_pmu_v4 {
 struct pmu_init_msg_pmu_v5 {
         u8 msg_type;
         u8 flcn_status;
-        u8  queue_index[PMU_QUEUE_COUNT_FOR_V4];
-        u16 queue_size[PMU_QUEUE_COUNT_FOR_V4];
+        u8  queue_index[PMU_QUEUE_COUNT_FOR_V5];
+        u16 queue_size[PMU_QUEUE_COUNT_FOR_V5];
         u16 queue_offset;
 
         u16 sw_managed_area_offset;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifboardobj.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifboardobj.h
index b8c1e394..697f95bc 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifboardobj.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifboardobj.h
@@ -1,5 +1,5 @@
 /*
-* Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+* Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
 *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -43,6 +43,7 @@
  */
 struct nv_pmu_boardobj {
         u8 type;
+        u8 grp_idx;
 };
 
 /*
@@ -51,6 +52,7 @@ struct nv_pmu_boardobj {
  */
 struct nv_pmu_boardobj_query {
         u8 type;
+        u8 grp_idx;
 };
 
 /*
@@ -61,7 +63,7 @@ struct nv_pmu_boardobjgrp_super {
         u8 type;
         u8 class_id;
         u8 obj_slots;
-        u8 rsvd;
+        u8 flags;
 };
 
 struct nv_pmu_boardobjgrp {