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-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/acr/acr_lsfm.h2
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/acr/nvgpu_acr.h8
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pgsp_gv100.h28
3 files changed, 37 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/acr/acr_lsfm.h b/drivers/gpu/nvgpu/include/nvgpu/acr/acr_lsfm.h
index 90d2d20d..f9d9e2a8 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/acr/acr_lsfm.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/acr/acr_lsfm.h
@@ -48,7 +48,7 @@
48 * Defines a common Light Secure Falcon identifier. 48 * Defines a common Light Secure Falcon identifier.
49 */ 49 */
50#define LSF_FALCON_ID_PMU (0) 50#define LSF_FALCON_ID_PMU (0)
51#define LSF_FALCON_ID_RESERVED (1) 51#define LSF_FALCON_ID_GSPLITE (1)
52#define LSF_FALCON_ID_FECS (2) 52#define LSF_FALCON_ID_FECS (2)
53#define LSF_FALCON_ID_GPCCS (3) 53#define LSF_FALCON_ID_GPCCS (3)
54#define LSF_FALCON_ID_SEC2 (7) 54#define LSF_FALCON_ID_SEC2 (7)
diff --git a/drivers/gpu/nvgpu/include/nvgpu/acr/nvgpu_acr.h b/drivers/gpu/nvgpu/include/nvgpu/acr/nvgpu_acr.h
index 5fb26e1a..ba658c95 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/acr/nvgpu_acr.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/acr/nvgpu_acr.h
@@ -40,6 +40,14 @@ struct nvgpu_acr;
40 40
41#define HSBIN_ACR_BL_UCODE_IMAGE "pmu_bl.bin" 41#define HSBIN_ACR_BL_UCODE_IMAGE "pmu_bl.bin"
42#define HSBIN_ACR_UCODE_IMAGE "acr_ucode.bin" 42#define HSBIN_ACR_UCODE_IMAGE "acr_ucode.bin"
43#define HSBIN_ACR_AHESASC_PROD_UCODE "acr_ahesasc_prod_ucode.bin"
44#define HSBIN_ACR_ASB_PROD_UCODE "acr_asb_prod_ucode.bin"
45#define HSBIN_ACR_AHESASC_DBG_UCODE "acr_ahesasc_dbg_ucode.bin"
46#define HSBIN_ACR_ASB_DBG_UCODE "acr_asb_dbg_ucode.bin"
47
48#define LSF_SEC2_UCODE_IMAGE_BIN "sec2_ucode_image.bin"
49#define LSF_SEC2_UCODE_DESC_BIN "sec2_ucode_desc.bin"
50#define LSF_SEC2_UCODE_SIG_BIN "sec2_sig.bin"
43 51
44#define MAX_SUPPORTED_LSFM 3 /*PMU, FECS, GPCCS*/ 52#define MAX_SUPPORTED_LSFM 3 /*PMU, FECS, GPCCS*/
45 53
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pgsp_gv100.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pgsp_gv100.h
index f0f5bc26..34d0eae8 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pgsp_gv100.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pgsp_gv100.h
@@ -252,6 +252,26 @@ static inline u32 pgsp_falcon_nxtctx_r(void)
252{ 252{
253 return 0x00110054U; 253 return 0x00110054U;
254} 254}
255static inline u32 pgsp_falcon_nxtctx_ctxptr_f(u32 v)
256{
257 return (v & 0xfffffffU) << 0U;
258}
259static inline u32 pgsp_falcon_nxtctx_ctxtgt_fb_f(void)
260{
261 return 0x0U;
262}
263static inline u32 pgsp_falcon_nxtctx_ctxtgt_sys_coh_f(void)
264{
265 return 0x20000000U;
266}
267static inline u32 pgsp_falcon_nxtctx_ctxtgt_sys_ncoh_f(void)
268{
269 return 0x30000000U;
270}
271static inline u32 pgsp_falcon_nxtctx_ctxvalid_f(u32 v)
272{
273 return (v & 0x1U) << 30U;
274}
255static inline u32 pgsp_falcon_mailbox0_r(void) 275static inline u32 pgsp_falcon_mailbox0_r(void)
256{ 276{
257 return 0x00110040U; 277 return 0x00110040U;
@@ -288,6 +308,14 @@ static inline u32 pgsp_falcon_engctl_r(void)
288{ 308{
289 return 0x001100a4U; 309 return 0x001100a4U;
290} 310}
311static inline u32 pgsp_falcon_engctl_switch_context_true_f(void)
312{
313 return 0x8U;
314}
315static inline u32 pgsp_falcon_engctl_switch_context_false_f(void)
316{
317 return 0x0U;
318}
291static inline u32 pgsp_falcon_cpuctl_r(void) 319static inline u32 pgsp_falcon_cpuctl_r(void)
292{ 320{
293 return 0x00110100U; 321 return 0x00110100U;