diff options
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/clk_arb.h | 82 |
1 files changed, 82 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h new file mode 100644 index 00000000..09f0b0d3 --- /dev/null +++ b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h | |||
@@ -0,0 +1,82 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | |||
23 | #ifndef __NVGPU_CLK_ARB_H__ | ||
24 | #define __NVGPU_CLK_ARB_H__ | ||
25 | |||
26 | #include <nvgpu/types.h> | ||
27 | |||
28 | struct gk20a; | ||
29 | struct nvgpu_clk_session; | ||
30 | |||
31 | int nvgpu_clk_arb_init_arbiter(struct gk20a *g); | ||
32 | |||
33 | int nvgpu_clk_arb_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, | ||
34 | u16 *min_mhz, u16 *max_mhz); | ||
35 | |||
36 | int nvgpu_clk_arb_get_arbiter_actual_mhz(struct gk20a *g, | ||
37 | u32 api_domain, u16 *actual_mhz); | ||
38 | |||
39 | int nvgpu_clk_arb_get_arbiter_effective_mhz(struct gk20a *g, | ||
40 | u32 api_domain, u16 *effective_mhz); | ||
41 | |||
42 | int nvgpu_clk_arb_get_arbiter_clk_f_points(struct gk20a *g, | ||
43 | u32 api_domain, u32 *max_points, u16 *fpoints); | ||
44 | |||
45 | u32 nvgpu_clk_arb_get_arbiter_clk_domains(struct gk20a *g); | ||
46 | bool nvgpu_clk_arb_is_valid_domain(struct gk20a *g, u32 api_domain); | ||
47 | |||
48 | void nvgpu_clk_arb_cleanup_arbiter(struct gk20a *g); | ||
49 | |||
50 | int nvgpu_clk_arb_install_session_fd(struct gk20a *g, | ||
51 | struct nvgpu_clk_session *session); | ||
52 | |||
53 | int nvgpu_clk_arb_init_session(struct gk20a *g, | ||
54 | struct nvgpu_clk_session **_session); | ||
55 | |||
56 | void nvgpu_clk_arb_release_session(struct gk20a *g, | ||
57 | struct nvgpu_clk_session *session); | ||
58 | |||
59 | int nvgpu_clk_arb_commit_request_fd(struct gk20a *g, | ||
60 | struct nvgpu_clk_session *session, int request_fd); | ||
61 | |||
62 | int nvgpu_clk_arb_set_session_target_mhz(struct nvgpu_clk_session *session, | ||
63 | int fd, u32 api_domain, u16 target_mhz); | ||
64 | |||
65 | int nvgpu_clk_arb_get_session_target_mhz(struct nvgpu_clk_session *session, | ||
66 | u32 api_domain, u16 *target_mhz); | ||
67 | |||
68 | int nvgpu_clk_arb_install_event_fd(struct gk20a *g, | ||
69 | struct nvgpu_clk_session *session, int *event_fd, u32 alarm_mask); | ||
70 | |||
71 | int nvgpu_clk_arb_install_request_fd(struct gk20a *g, | ||
72 | struct nvgpu_clk_session *session, int *event_fd); | ||
73 | |||
74 | void nvgpu_clk_arb_schedule_vf_table_update(struct gk20a *g); | ||
75 | |||
76 | int nvgpu_clk_arb_get_current_pstate(struct gk20a *g); | ||
77 | |||
78 | void nvgpu_clk_arb_pstate_change_lock(struct gk20a *g, bool lock); | ||
79 | |||
80 | void nvgpu_clk_arb_schedule_alarm(struct gk20a *g, u32 alarm); | ||
81 | #endif /* __NVGPU_CLK_ARB_H__ */ | ||
82 | |||