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Diffstat (limited to 'drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperfvfe.h')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperfvfe.h229
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diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperfvfe.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperfvfe.h
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+++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperfvfe.h
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1/*
2 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22#ifndef _GPMUIFPERFVFE_H_
23#define _GPMUIFPERFVFE_H_
24
25#include "gpmuifbios.h"
26#include "gpmuifboardobj.h"
27
28#define CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT 0x03
29#define NV_PMU_PERF_RPC_VFE_EQU_EVAL_VAR_COUNT_MAX 2
30#define NV_PMU_PERF_RPC_VFE_EQU_MONITOR_COUNT_MAX 16
31#define NV_PMU_VFE_VAR_SINGLE_SENSED_FUSE_SEGMENTS_MAX 1
32
33struct nv_pmu_perf_vfe_var_value {
34 u8 var_type;
35 u8 reserved[3];
36 u32 var_value;
37};
38
39union nv_pmu_perf_vfe_equ_result {
40 u32 freq_m_hz;
41 u32 voltu_v;
42 u32 vf_gain;
43 int volt_deltau_v;
44};
45
46struct nv_pmu_perf_rpc_vfe_equ_eval {
47 u8 equ_idx;
48 u8 var_count;
49 u8 output_type;
50 struct nv_pmu_perf_vfe_var_value var_values[
51 NV_PMU_PERF_RPC_VFE_EQU_EVAL_VAR_COUNT_MAX];
52 union nv_pmu_perf_vfe_equ_result result;
53};
54
55struct nv_pmu_perf_rpc_vfe_load {
56 bool b_load;
57};
58
59struct nv_pmu_perf_vfe_var_boardobjgrp_get_status_header {
60 struct nv_pmu_boardobjgrp_e32 super;
61};
62
63struct nv_pmu_perf_vfe_var_get_status_super {
64 struct nv_pmu_boardobj_query board_obj;
65};
66
67struct nv_pmu_perf_vfe_var_single_sensed_fuse_get_status {
68 struct nv_pmu_perf_vfe_var_get_status_super super;
69 u32 fuse_value_integer;
70 u32 fuse_value_hw_integer;
71 u8 fuse_version;
72 bool b_version_check_failed;
73};
74
75union nv_pmu_perf_vfe_var_boardobj_get_status_union {
76 struct nv_pmu_boardobj_query board_obj;
77 struct nv_pmu_perf_vfe_var_get_status_super super;
78 struct nv_pmu_perf_vfe_var_single_sensed_fuse_get_status fuse_status;
79};
80
81NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE_E32(perf, vfe_var);
82
83struct nv_pmu_vfe_var {
84 struct nv_pmu_boardobj super;
85 u32 out_range_min;
86 u32 out_range_max;
87};
88
89struct nv_pmu_vfe_var_derived {
90 struct nv_pmu_vfe_var super;
91};
92
93struct nv_pmu_vfe_var_derived_product {
94 struct nv_pmu_vfe_var_derived super;
95 u8 var_idx0;
96 u8 var_idx1;
97};
98
99struct nv_pmu_vfe_var_derived_sum {
100 struct nv_pmu_vfe_var_derived super;
101 u8 var_idx0;
102 u8 var_idx1;
103};
104
105struct nv_pmu_vfe_var_single {
106 struct nv_pmu_vfe_var super;
107 u8 override_type;
108 u32 override_value;
109};
110
111struct nv_pmu_vfe_var_single_frequency {
112 struct nv_pmu_vfe_var_single super;
113};
114
115struct nv_pmu_vfe_var_single_sensed {
116 struct nv_pmu_vfe_var_single super;
117};
118
119struct nv_pmu_vfe_var_single_sensed_fuse_info {
120 u8 segment_count;
121 union nv_pmu_bios_vfield_register_segment segments[
122 NV_PMU_VFE_VAR_SINGLE_SENSED_FUSE_SEGMENTS_MAX];
123};
124
125struct nv_pmu_vfe_var_single_sensed_fuse_vfield_info {
126 struct nv_pmu_vfe_var_single_sensed_fuse_info fuse;
127 u32 fuse_val_default;
128 int hw_correction_scale;
129 int hw_correction_offset;
130 u8 v_field_id;
131};
132
133struct nv_pmu_vfe_var_single_sensed_fuse_ver_vfield_info {
134 struct nv_pmu_vfe_var_single_sensed_fuse_info fuse;
135 u8 ver_expected;
136 bool b_ver_check;
137 bool b_use_default_on_ver_check_fail;
138 u8 v_field_id_ver;
139};
140
141struct nv_pmu_vfe_var_single_sensed_fuse_override_info {
142 u32 fuse_val_override;
143 bool b_fuse_regkey_override;
144};
145
146struct nv_pmu_vfe_var_single_sensed_fuse {
147 struct nv_pmu_vfe_var_single_sensed super;
148 struct nv_pmu_vfe_var_single_sensed_fuse_override_info override_info;
149 struct nv_pmu_vfe_var_single_sensed_fuse_vfield_info vfield_info;
150 struct nv_pmu_vfe_var_single_sensed_fuse_ver_vfield_info vfield_ver_info;
151};
152
153struct nv_pmu_vfe_var_single_sensed_temp {
154 struct nv_pmu_vfe_var_single_sensed super;
155 u8 therm_channel_index;
156 int temp_hysteresis_positive;
157 int temp_hysteresis_negative;
158 int temp_default;
159};
160
161struct nv_pmu_vfe_var_single_voltage {
162 struct nv_pmu_vfe_var_single super;
163};
164
165struct nv_pmu_perf_vfe_var_boardobjgrp_set_header {
166 struct nv_pmu_boardobjgrp_e32 super;
167 u8 polling_periodms;
168};
169
170union nv_pmu_perf_vfe_var_boardobj_set_union {
171 struct nv_pmu_boardobj board_obj;
172 struct nv_pmu_vfe_var var;
173 struct nv_pmu_vfe_var_derived var_derived;
174 struct nv_pmu_vfe_var_derived_product var_derived_product;
175 struct nv_pmu_vfe_var_derived_sum var_derived_sum;
176 struct nv_pmu_vfe_var_single var_single;
177 struct nv_pmu_vfe_var_single_frequency var_single_frequiency;
178 struct nv_pmu_vfe_var_single_sensed var_single_sensed;
179 struct nv_pmu_vfe_var_single_sensed_fuse var_single_sensed_fuse;
180 struct nv_pmu_vfe_var_single_sensed_temp var_single_sensed_temp;
181 struct nv_pmu_vfe_var_single_voltage var_single_voltage;
182};
183
184NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(perf, vfe_var);
185
186struct nv_pmu_vfe_equ {
187 struct nv_pmu_boardobj super;
188 u8 var_idx;
189 u8 equ_idx_next;
190 u8 output_type;
191 u32 out_range_min;
192 u32 out_range_max;
193};
194
195struct nv_pmu_vfe_equ_compare {
196 struct nv_pmu_vfe_equ super;
197 u8 func_id;
198 u8 equ_idx_true;
199 u8 equ_idx_false;
200 u32 criteria;
201};
202
203struct nv_pmu_vfe_equ_minmax {
204 struct nv_pmu_vfe_equ super;
205 bool b_max;
206 u8 equ_idx0;
207 u8 equ_idx1;
208};
209
210struct nv_pmu_vfe_equ_quadratic {
211 struct nv_pmu_vfe_equ super;
212 u32 coeffs[CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT];
213};
214
215struct nv_pmu_perf_vfe_equ_boardobjgrp_set_header {
216 struct nv_pmu_boardobjgrp_e255 super;
217};
218
219union nv_pmu_perf_vfe_equ_boardobj_set_union {
220 struct nv_pmu_boardobj board_obj;
221 struct nv_pmu_vfe_equ equ;
222 struct nv_pmu_vfe_equ_compare equ_comapre;
223 struct nv_pmu_vfe_equ_minmax equ_minmax;
224 struct nv_pmu_vfe_equ_quadratic equ_quadratic;
225};
226
227NV_PMU_BOARDOBJ_GRP_SET_MAKE_E255(perf, vfe_equ);
228
229#endif /* _GPMUIFPERFVFE_H_*/
generated by cgit v1.2.2 (git 2.25.0) at 2024-08-22 13:38:48 -0400