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path: root/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b
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Diffstat (limited to 'drivers/gpu/nvgpu/include/nvgpu/hw/gv11b')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h6
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h10
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h4
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pwr_gv11b.h4
4 files changed, 14 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h
index aa8e6190..8b095b1a 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -140,6 +140,10 @@ static inline u32 ctxsw_prog_main_image_pm_mode_m(void)
140{ 140{
141 return 0x7U << 0U; 141 return 0x7U << 0U;
142} 142}
143static inline u32 ctxsw_prog_main_image_pm_mode_ctxsw_f(void)
144{
145 return 0x1U;
146}
143static inline u32 ctxsw_prog_main_image_pm_mode_no_ctxsw_f(void) 147static inline u32 ctxsw_prog_main_image_pm_mode_no_ctxsw_f(void)
144{ 148{
145 return 0x0U; 149 return 0x0U;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h
index fe35bb71..767fc5a0 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h
@@ -62,7 +62,7 @@ static inline u32 fb_fbhub_num_active_ltcs_r(void)
62} 62}
63static inline u32 fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_m(void) 63static inline u32 fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_m(void)
64{ 64{
65 return U32(0x1U) << 25U; 65 return 0x1U << 25U;
66} 66}
67static inline u32 fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_use_rmw_f(void) 67static inline u32 fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_use_rmw_f(void)
68{ 68{
@@ -70,7 +70,7 @@ static inline u32 fb_fbhub_num_active_ltcs_hub_sys_atomic_mode_use_rmw_f(void)
70} 70}
71static inline u32 fb_fbhub_num_active_ltcs_hub_sys_ncoh_atomic_mode_m(void) 71static inline u32 fb_fbhub_num_active_ltcs_hub_sys_ncoh_atomic_mode_m(void)
72{ 72{
73 return U32(0x1U) << 26U; 73 return 0x1U << 26U;
74} 74}
75static inline u32 fb_fbhub_num_active_ltcs_hub_sys_ncoh_atomic_mode_use_read_f(void) 75static inline u32 fb_fbhub_num_active_ltcs_hub_sys_ncoh_atomic_mode_use_read_f(void)
76{ 76{
@@ -94,7 +94,7 @@ static inline u32 fb_mmu_ctrl_pri_fifo_space_v(u32 r)
94} 94}
95static inline u32 fb_mmu_ctrl_atomic_capability_mode_m(void) 95static inline u32 fb_mmu_ctrl_atomic_capability_mode_m(void)
96{ 96{
97 return U32(0x3U) << 24U; 97 return 0x3U << 24U;
98} 98}
99static inline u32 fb_mmu_ctrl_atomic_capability_mode_l2_f(void) 99static inline u32 fb_mmu_ctrl_atomic_capability_mode_l2_f(void)
100{ 100{
@@ -106,7 +106,7 @@ static inline u32 fb_mmu_ctrl_atomic_capability_mode_rmw_f(void)
106} 106}
107static inline u32 fb_mmu_ctrl_atomic_capability_sys_ncoh_mode_m(void) 107static inline u32 fb_mmu_ctrl_atomic_capability_sys_ncoh_mode_m(void)
108{ 108{
109 return U32(0x1U) << 27U; 109 return 0x1U << 27U;
110} 110}
111static inline u32 fb_mmu_ctrl_atomic_capability_sys_ncoh_mode_l2_f(void) 111static inline u32 fb_mmu_ctrl_atomic_capability_sys_ncoh_mode_l2_f(void)
112{ 112{
@@ -118,7 +118,7 @@ static inline u32 fb_hshub_num_active_ltcs_r(void)
118} 118}
119static inline u32 fb_hshub_num_active_ltcs_hub_sys_atomic_mode_m(void) 119static inline u32 fb_hshub_num_active_ltcs_hub_sys_atomic_mode_m(void)
120{ 120{
121 return U32(0x1U) << 25U; 121 return 0x1U << 25U;
122} 122}
123static inline u32 fb_hshub_num_active_ltcs_hub_sys_atomic_mode_use_read_f(void) 123static inline u32 fb_hshub_num_active_ltcs_hub_sys_atomic_mode_use_read_f(void)
124{ 124{
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
index 01dc99d5..f7d8089d 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
@@ -4978,11 +4978,11 @@ static inline u32 gr_gpcs_pri_mmu_ctrl_mmu_disable_m(void)
4978} 4978}
4979static inline u32 gr_gpcs_pri_mmu_ctrl_atomic_capability_mode_m(void) 4979static inline u32 gr_gpcs_pri_mmu_ctrl_atomic_capability_mode_m(void)
4980{ 4980{
4981 return U32(0x3U) << 24U; 4981 return 0x3U << 24U;
4982} 4982}
4983static inline u32 gr_gpcs_pri_mmu_ctrl_atomic_capability_sys_ncoh_mode_m(void) 4983static inline u32 gr_gpcs_pri_mmu_ctrl_atomic_capability_sys_ncoh_mode_m(void)
4984{ 4984{
4985 return U32(0x1U) << 27U; 4985 return 0x1U << 27U;
4986} 4986}
4987static inline u32 gr_gpcs_pri_mmu_pm_unit_mask_r(void) 4987static inline u32 gr_gpcs_pri_mmu_pm_unit_mask_r(void)
4988{ 4988{
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pwr_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pwr_gv11b.h
index 295c6e95..03affe8e 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pwr_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pwr_gv11b.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -914,7 +914,7 @@ static inline u32 pwr_pmu_idle_intr_status_intr_f(u32 v)
914} 914}
915static inline u32 pwr_pmu_idle_intr_status_intr_m(void) 915static inline u32 pwr_pmu_idle_intr_status_intr_m(void)
916{ 916{
917 return U32(0x1U) << 0U; 917 return 0x1U << 0U;
918} 918}
919static inline u32 pwr_pmu_idle_intr_status_intr_v(u32 r) 919static inline u32 pwr_pmu_idle_intr_status_intr_v(u32 r)
920{ 920{