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path: root/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pwr_gv100.h
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Diffstat (limited to 'drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pwr_gv100.h')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pwr_gv100.h48
1 files changed, 48 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pwr_gv100.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pwr_gv100.h
index 4b0b0326..c719226c 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pwr_gv100.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pwr_gv100.h
@@ -824,6 +824,54 @@ static inline u32 pwr_pmu_idle_ctrl_filter_disabled_f(void)
824{ 824{
825 return 0x0U; 825 return 0x0U;
826} 826}
827static inline u32 pwr_pmu_idle_threshold_r(u32 i)
828{
829 return 0x0010a8a0U + i*4U;
830}
831static inline u32 pwr_pmu_idle_threshold_value_f(u32 v)
832{
833 return (v & 0x7fffffffU) << 0U;
834}
835static inline u32 pwr_pmu_idle_intr_r(void)
836{
837 return 0x0010a9e8U;
838}
839static inline u32 pwr_pmu_idle_intr_en_f(u32 v)
840{
841 return (v & 0x1U) << 0U;
842}
843static inline u32 pwr_pmu_idle_intr_en_disabled_v(void)
844{
845 return 0x00000000U;
846}
847static inline u32 pwr_pmu_idle_intr_en_enabled_v(void)
848{
849 return 0x00000001U;
850}
851static inline u32 pwr_pmu_idle_intr_status_r(void)
852{
853 return 0x0010a9ecU;
854}
855static inline u32 pwr_pmu_idle_intr_status_intr_f(u32 v)
856{
857 return (v & 0x1U) << 0U;
858}
859static inline u32 pwr_pmu_idle_intr_status_intr_m(void)
860{
861 return U32(0x1U) << 0U;
862}
863static inline u32 pwr_pmu_idle_intr_status_intr_v(u32 r)
864{
865 return (r >> 0U) & 0x1U;
866}
867static inline u32 pwr_pmu_idle_intr_status_intr_pending_v(void)
868{
869 return 0x00000001U;
870}
871static inline u32 pwr_pmu_idle_intr_status_intr_clear_v(void)
872{
873 return 0x00000001U;
874}
827static inline u32 pwr_pmu_idle_mask_supp_r(u32 i) 875static inline u32 pwr_pmu_idle_mask_supp_r(u32 i)
828{ 876{
829 return 0x0010a9f0U + i*8U; 877 return 0x0010a9f0U + i*8U;