diff options
Diffstat (limited to 'drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_mc_gp10b.h')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_mc_gp10b.h | 96 |
1 files changed, 48 insertions, 48 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_mc_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_mc_gp10b.h index 9d1d6189..dbf0ce35 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_mc_gp10b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_mc_gp10b.h | |||
@@ -58,194 +58,194 @@ | |||
58 | 58 | ||
59 | static inline u32 mc_boot_0_r(void) | 59 | static inline u32 mc_boot_0_r(void) |
60 | { | 60 | { |
61 | return 0x00000000; | 61 | return 0x00000000U; |
62 | } | 62 | } |
63 | static inline u32 mc_boot_0_architecture_v(u32 r) | 63 | static inline u32 mc_boot_0_architecture_v(u32 r) |
64 | { | 64 | { |
65 | return (r >> 24) & 0x1f; | 65 | return (r >> 24U) & 0x1fU; |
66 | } | 66 | } |
67 | static inline u32 mc_boot_0_implementation_v(u32 r) | 67 | static inline u32 mc_boot_0_implementation_v(u32 r) |
68 | { | 68 | { |
69 | return (r >> 20) & 0xf; | 69 | return (r >> 20U) & 0xfU; |
70 | } | 70 | } |
71 | static inline u32 mc_boot_0_major_revision_v(u32 r) | 71 | static inline u32 mc_boot_0_major_revision_v(u32 r) |
72 | { | 72 | { |
73 | return (r >> 4) & 0xf; | 73 | return (r >> 4U) & 0xfU; |
74 | } | 74 | } |
75 | static inline u32 mc_boot_0_minor_revision_v(u32 r) | 75 | static inline u32 mc_boot_0_minor_revision_v(u32 r) |
76 | { | 76 | { |
77 | return (r >> 0) & 0xf; | 77 | return (r >> 0U) & 0xfU; |
78 | } | 78 | } |
79 | static inline u32 mc_intr_r(u32 i) | 79 | static inline u32 mc_intr_r(u32 i) |
80 | { | 80 | { |
81 | return 0x00000100 + i*4; | 81 | return 0x00000100U + i*4U; |
82 | } | 82 | } |
83 | static inline u32 mc_intr_pfifo_pending_f(void) | 83 | static inline u32 mc_intr_pfifo_pending_f(void) |
84 | { | 84 | { |
85 | return 0x100; | 85 | return 0x100U; |
86 | } | 86 | } |
87 | static inline u32 mc_intr_replayable_fault_pending_f(void) | 87 | static inline u32 mc_intr_replayable_fault_pending_f(void) |
88 | { | 88 | { |
89 | return 0x200; | 89 | return 0x200U; |
90 | } | 90 | } |
91 | static inline u32 mc_intr_pgraph_pending_f(void) | 91 | static inline u32 mc_intr_pgraph_pending_f(void) |
92 | { | 92 | { |
93 | return 0x1000; | 93 | return 0x1000U; |
94 | } | 94 | } |
95 | static inline u32 mc_intr_pmu_pending_f(void) | 95 | static inline u32 mc_intr_pmu_pending_f(void) |
96 | { | 96 | { |
97 | return 0x1000000; | 97 | return 0x1000000U; |
98 | } | 98 | } |
99 | static inline u32 mc_intr_ltc_pending_f(void) | 99 | static inline u32 mc_intr_ltc_pending_f(void) |
100 | { | 100 | { |
101 | return 0x2000000; | 101 | return 0x2000000U; |
102 | } | 102 | } |
103 | static inline u32 mc_intr_priv_ring_pending_f(void) | 103 | static inline u32 mc_intr_priv_ring_pending_f(void) |
104 | { | 104 | { |
105 | return 0x40000000; | 105 | return 0x40000000U; |
106 | } | 106 | } |
107 | static inline u32 mc_intr_pbus_pending_f(void) | 107 | static inline u32 mc_intr_pbus_pending_f(void) |
108 | { | 108 | { |
109 | return 0x10000000; | 109 | return 0x10000000U; |
110 | } | 110 | } |
111 | static inline u32 mc_intr_en_r(u32 i) | 111 | static inline u32 mc_intr_en_r(u32 i) |
112 | { | 112 | { |
113 | return 0x00000140 + i*4; | 113 | return 0x00000140U + i*4U; |
114 | } | 114 | } |
115 | static inline u32 mc_intr_en_set_r(u32 i) | 115 | static inline u32 mc_intr_en_set_r(u32 i) |
116 | { | 116 | { |
117 | return 0x00000160 + i*4; | 117 | return 0x00000160U + i*4U; |
118 | } | 118 | } |
119 | static inline u32 mc_intr_en_clear_r(u32 i) | 119 | static inline u32 mc_intr_en_clear_r(u32 i) |
120 | { | 120 | { |
121 | return 0x00000180 + i*4; | 121 | return 0x00000180U + i*4U; |
122 | } | 122 | } |
123 | static inline u32 mc_enable_r(void) | 123 | static inline u32 mc_enable_r(void) |
124 | { | 124 | { |
125 | return 0x00000200; | 125 | return 0x00000200U; |
126 | } | 126 | } |
127 | static inline u32 mc_enable_xbar_enabled_f(void) | 127 | static inline u32 mc_enable_xbar_enabled_f(void) |
128 | { | 128 | { |
129 | return 0x4; | 129 | return 0x4U; |
130 | } | 130 | } |
131 | static inline u32 mc_enable_l2_enabled_f(void) | 131 | static inline u32 mc_enable_l2_enabled_f(void) |
132 | { | 132 | { |
133 | return 0x8; | 133 | return 0x8U; |
134 | } | 134 | } |
135 | static inline u32 mc_enable_pmedia_s(void) | 135 | static inline u32 mc_enable_pmedia_s(void) |
136 | { | 136 | { |
137 | return 1; | 137 | return 1U; |
138 | } | 138 | } |
139 | static inline u32 mc_enable_pmedia_f(u32 v) | 139 | static inline u32 mc_enable_pmedia_f(u32 v) |
140 | { | 140 | { |
141 | return (v & 0x1) << 4; | 141 | return (v & 0x1U) << 4U; |
142 | } | 142 | } |
143 | static inline u32 mc_enable_pmedia_m(void) | 143 | static inline u32 mc_enable_pmedia_m(void) |
144 | { | 144 | { |
145 | return 0x1 << 4; | 145 | return 0x1U << 4U; |
146 | } | 146 | } |
147 | static inline u32 mc_enable_pmedia_v(u32 r) | 147 | static inline u32 mc_enable_pmedia_v(u32 r) |
148 | { | 148 | { |
149 | return (r >> 4) & 0x1; | 149 | return (r >> 4U) & 0x1U; |
150 | } | 150 | } |
151 | static inline u32 mc_enable_priv_ring_enabled_f(void) | 151 | static inline u32 mc_enable_priv_ring_enabled_f(void) |
152 | { | 152 | { |
153 | return 0x20; | 153 | return 0x20U; |
154 | } | 154 | } |
155 | static inline u32 mc_enable_ce0_m(void) | 155 | static inline u32 mc_enable_ce0_m(void) |
156 | { | 156 | { |
157 | return 0x1 << 6; | 157 | return 0x1U << 6U; |
158 | } | 158 | } |
159 | static inline u32 mc_enable_pfifo_enabled_f(void) | 159 | static inline u32 mc_enable_pfifo_enabled_f(void) |
160 | { | 160 | { |
161 | return 0x100; | 161 | return 0x100U; |
162 | } | 162 | } |
163 | static inline u32 mc_enable_pgraph_enabled_f(void) | 163 | static inline u32 mc_enable_pgraph_enabled_f(void) |
164 | { | 164 | { |
165 | return 0x1000; | 165 | return 0x1000U; |
166 | } | 166 | } |
167 | static inline u32 mc_enable_pwr_v(u32 r) | 167 | static inline u32 mc_enable_pwr_v(u32 r) |
168 | { | 168 | { |
169 | return (r >> 13) & 0x1; | 169 | return (r >> 13U) & 0x1U; |
170 | } | 170 | } |
171 | static inline u32 mc_enable_pwr_disabled_v(void) | 171 | static inline u32 mc_enable_pwr_disabled_v(void) |
172 | { | 172 | { |
173 | return 0x00000000; | 173 | return 0x00000000U; |
174 | } | 174 | } |
175 | static inline u32 mc_enable_pwr_enabled_f(void) | 175 | static inline u32 mc_enable_pwr_enabled_f(void) |
176 | { | 176 | { |
177 | return 0x2000; | 177 | return 0x2000U; |
178 | } | 178 | } |
179 | static inline u32 mc_enable_pfb_enabled_f(void) | 179 | static inline u32 mc_enable_pfb_enabled_f(void) |
180 | { | 180 | { |
181 | return 0x100000; | 181 | return 0x100000U; |
182 | } | 182 | } |
183 | static inline u32 mc_enable_ce2_m(void) | 183 | static inline u32 mc_enable_ce2_m(void) |
184 | { | 184 | { |
185 | return 0x1 << 21; | 185 | return 0x1U << 21U; |
186 | } | 186 | } |
187 | static inline u32 mc_enable_ce2_enabled_f(void) | 187 | static inline u32 mc_enable_ce2_enabled_f(void) |
188 | { | 188 | { |
189 | return 0x200000; | 189 | return 0x200000U; |
190 | } | 190 | } |
191 | static inline u32 mc_enable_blg_enabled_f(void) | 191 | static inline u32 mc_enable_blg_enabled_f(void) |
192 | { | 192 | { |
193 | return 0x8000000; | 193 | return 0x8000000U; |
194 | } | 194 | } |
195 | static inline u32 mc_enable_perfmon_enabled_f(void) | 195 | static inline u32 mc_enable_perfmon_enabled_f(void) |
196 | { | 196 | { |
197 | return 0x10000000; | 197 | return 0x10000000U; |
198 | } | 198 | } |
199 | static inline u32 mc_enable_hub_enabled_f(void) | 199 | static inline u32 mc_enable_hub_enabled_f(void) |
200 | { | 200 | { |
201 | return 0x20000000; | 201 | return 0x20000000U; |
202 | } | 202 | } |
203 | static inline u32 mc_intr_ltc_r(void) | 203 | static inline u32 mc_intr_ltc_r(void) |
204 | { | 204 | { |
205 | return 0x000001c0; | 205 | return 0x000001c0U; |
206 | } | 206 | } |
207 | static inline u32 mc_enable_pb_r(void) | 207 | static inline u32 mc_enable_pb_r(void) |
208 | { | 208 | { |
209 | return 0x00000204; | 209 | return 0x00000204U; |
210 | } | 210 | } |
211 | static inline u32 mc_enable_pb_0_s(void) | 211 | static inline u32 mc_enable_pb_0_s(void) |
212 | { | 212 | { |
213 | return 1; | 213 | return 1U; |
214 | } | 214 | } |
215 | static inline u32 mc_enable_pb_0_f(u32 v) | 215 | static inline u32 mc_enable_pb_0_f(u32 v) |
216 | { | 216 | { |
217 | return (v & 0x1) << 0; | 217 | return (v & 0x1U) << 0U; |
218 | } | 218 | } |
219 | static inline u32 mc_enable_pb_0_m(void) | 219 | static inline u32 mc_enable_pb_0_m(void) |
220 | { | 220 | { |
221 | return 0x1 << 0; | 221 | return 0x1U << 0U; |
222 | } | 222 | } |
223 | static inline u32 mc_enable_pb_0_v(u32 r) | 223 | static inline u32 mc_enable_pb_0_v(u32 r) |
224 | { | 224 | { |
225 | return (r >> 0) & 0x1; | 225 | return (r >> 0U) & 0x1U; |
226 | } | 226 | } |
227 | static inline u32 mc_enable_pb_0_enabled_v(void) | 227 | static inline u32 mc_enable_pb_0_enabled_v(void) |
228 | { | 228 | { |
229 | return 0x00000001; | 229 | return 0x00000001U; |
230 | } | 230 | } |
231 | static inline u32 mc_enable_pb_sel_f(u32 v, u32 i) | 231 | static inline u32 mc_enable_pb_sel_f(u32 v, u32 i) |
232 | { | 232 | { |
233 | return (v & 0x1) << (0 + i*1); | 233 | return (v & 0x1U) << (0U + i*1U); |
234 | } | 234 | } |
235 | static inline u32 mc_elpg_enable_r(void) | 235 | static inline u32 mc_elpg_enable_r(void) |
236 | { | 236 | { |
237 | return 0x0000020c; | 237 | return 0x0000020cU; |
238 | } | 238 | } |
239 | static inline u32 mc_elpg_enable_xbar_enabled_f(void) | 239 | static inline u32 mc_elpg_enable_xbar_enabled_f(void) |
240 | { | 240 | { |
241 | return 0x4; | 241 | return 0x4U; |
242 | } | 242 | } |
243 | static inline u32 mc_elpg_enable_pfb_enabled_f(void) | 243 | static inline u32 mc_elpg_enable_pfb_enabled_f(void) |
244 | { | 244 | { |
245 | return 0x100000; | 245 | return 0x100000U; |
246 | } | 246 | } |
247 | static inline u32 mc_elpg_enable_hub_enabled_f(void) | 247 | static inline u32 mc_elpg_enable_hub_enabled_f(void) |
248 | { | 248 | { |
249 | return 0x20000000; | 249 | return 0x20000000U; |
250 | } | 250 | } |
251 | #endif | 251 | #endif |