diff options
Diffstat (limited to 'drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fuse_gp10b.h')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fuse_gp10b.h | 46 |
1 files changed, 23 insertions, 23 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fuse_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fuse_gp10b.h index dc5128c4..29107fb8 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fuse_gp10b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fuse_gp10b.h | |||
@@ -58,94 +58,94 @@ | |||
58 | 58 | ||
59 | static inline u32 fuse_status_opt_tpc_gpc_r(u32 i) | 59 | static inline u32 fuse_status_opt_tpc_gpc_r(u32 i) |
60 | { | 60 | { |
61 | return 0x00021c38 + i*4; | 61 | return 0x00021c38U + i*4U; |
62 | } | 62 | } |
63 | static inline u32 fuse_ctrl_opt_tpc_gpc_r(u32 i) | 63 | static inline u32 fuse_ctrl_opt_tpc_gpc_r(u32 i) |
64 | { | 64 | { |
65 | return 0x00021838 + i*4; | 65 | return 0x00021838U + i*4U; |
66 | } | 66 | } |
67 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_r(void) | 67 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_r(void) |
68 | { | 68 | { |
69 | return 0x00021944; | 69 | return 0x00021944U; |
70 | } | 70 | } |
71 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_f(u32 v) | 71 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_f(u32 v) |
72 | { | 72 | { |
73 | return (v & 0xff) << 0; | 73 | return (v & 0xffU) << 0U; |
74 | } | 74 | } |
75 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_m(void) | 75 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_m(void) |
76 | { | 76 | { |
77 | return 0xff << 0; | 77 | return 0xffU << 0U; |
78 | } | 78 | } |
79 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_v(u32 r) | 79 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_data_v(u32 r) |
80 | { | 80 | { |
81 | return (r >> 0) & 0xff; | 81 | return (r >> 0U) & 0xffU; |
82 | } | 82 | } |
83 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_r(void) | 83 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_r(void) |
84 | { | 84 | { |
85 | return 0x00021948; | 85 | return 0x00021948U; |
86 | } | 86 | } |
87 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_f(u32 v) | 87 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_f(u32 v) |
88 | { | 88 | { |
89 | return (v & 0x1) << 0; | 89 | return (v & 0x1U) << 0U; |
90 | } | 90 | } |
91 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_m(void) | 91 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_m(void) |
92 | { | 92 | { |
93 | return 0x1 << 0; | 93 | return 0x1U << 0U; |
94 | } | 94 | } |
95 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_v(u32 r) | 95 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_v(u32 r) |
96 | { | 96 | { |
97 | return (r >> 0) & 0x1; | 97 | return (r >> 0U) & 0x1U; |
98 | } | 98 | } |
99 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_yes_f(void) | 99 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_yes_f(void) |
100 | { | 100 | { |
101 | return 0x1; | 101 | return 0x1U; |
102 | } | 102 | } |
103 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_no_f(void) | 103 | static inline u32 fuse_ctrl_opt_ram_svop_pdp_override_data_no_f(void) |
104 | { | 104 | { |
105 | return 0x0; | 105 | return 0x0U; |
106 | } | 106 | } |
107 | static inline u32 fuse_status_opt_fbio_r(void) | 107 | static inline u32 fuse_status_opt_fbio_r(void) |
108 | { | 108 | { |
109 | return 0x00021c14; | 109 | return 0x00021c14U; |
110 | } | 110 | } |
111 | static inline u32 fuse_status_opt_fbio_data_f(u32 v) | 111 | static inline u32 fuse_status_opt_fbio_data_f(u32 v) |
112 | { | 112 | { |
113 | return (v & 0xffff) << 0; | 113 | return (v & 0xffffU) << 0U; |
114 | } | 114 | } |
115 | static inline u32 fuse_status_opt_fbio_data_m(void) | 115 | static inline u32 fuse_status_opt_fbio_data_m(void) |
116 | { | 116 | { |
117 | return 0xffff << 0; | 117 | return 0xffffU << 0U; |
118 | } | 118 | } |
119 | static inline u32 fuse_status_opt_fbio_data_v(u32 r) | 119 | static inline u32 fuse_status_opt_fbio_data_v(u32 r) |
120 | { | 120 | { |
121 | return (r >> 0) & 0xffff; | 121 | return (r >> 0U) & 0xffffU; |
122 | } | 122 | } |
123 | static inline u32 fuse_status_opt_rop_l2_fbp_r(u32 i) | 123 | static inline u32 fuse_status_opt_rop_l2_fbp_r(u32 i) |
124 | { | 124 | { |
125 | return 0x00021d70 + i*4; | 125 | return 0x00021d70U + i*4U; |
126 | } | 126 | } |
127 | static inline u32 fuse_status_opt_fbp_r(void) | 127 | static inline u32 fuse_status_opt_fbp_r(void) |
128 | { | 128 | { |
129 | return 0x00021d38; | 129 | return 0x00021d38U; |
130 | } | 130 | } |
131 | static inline u32 fuse_status_opt_fbp_idx_v(u32 r, u32 i) | 131 | static inline u32 fuse_status_opt_fbp_idx_v(u32 r, u32 i) |
132 | { | 132 | { |
133 | return (r >> (0 + i*1)) & 0x1; | 133 | return (r >> (0U + i*1U)) & 0x1U; |
134 | } | 134 | } |
135 | static inline u32 fuse_opt_ecc_en_r(void) | 135 | static inline u32 fuse_opt_ecc_en_r(void) |
136 | { | 136 | { |
137 | return 0x00021228; | 137 | return 0x00021228U; |
138 | } | 138 | } |
139 | static inline u32 fuse_opt_feature_fuses_override_disable_r(void) | 139 | static inline u32 fuse_opt_feature_fuses_override_disable_r(void) |
140 | { | 140 | { |
141 | return 0x000213f0; | 141 | return 0x000213f0U; |
142 | } | 142 | } |
143 | static inline u32 fuse_opt_sec_debug_en_r(void) | 143 | static inline u32 fuse_opt_sec_debug_en_r(void) |
144 | { | 144 | { |
145 | return 0x00021218; | 145 | return 0x00021218U; |
146 | } | 146 | } |
147 | static inline u32 fuse_opt_priv_sec_en_r(void) | 147 | static inline u32 fuse_opt_priv_sec_en_r(void) |
148 | { | 148 | { |
149 | return 0x00021434; | 149 | return 0x00021434U; |
150 | } | 150 | } |
151 | #endif | 151 | #endif |