diff options
Diffstat (limited to 'drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_perf_gm20b.h')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_perf_gm20b.h | 76 |
1 files changed, 38 insertions, 38 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_perf_gm20b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_perf_gm20b.h index 75118476..ae34cabd 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_perf_gm20b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_perf_gm20b.h | |||
@@ -58,154 +58,154 @@ | |||
58 | 58 | ||
59 | static inline u32 perf_pmasys_control_r(void) | 59 | static inline u32 perf_pmasys_control_r(void) |
60 | { | 60 | { |
61 | return 0x001b4000; | 61 | return 0x001b4000U; |
62 | } | 62 | } |
63 | static inline u32 perf_pmasys_control_membuf_status_v(u32 r) | 63 | static inline u32 perf_pmasys_control_membuf_status_v(u32 r) |
64 | { | 64 | { |
65 | return (r >> 4) & 0x1; | 65 | return (r >> 4U) & 0x1U; |
66 | } | 66 | } |
67 | static inline u32 perf_pmasys_control_membuf_status_overflowed_v(void) | 67 | static inline u32 perf_pmasys_control_membuf_status_overflowed_v(void) |
68 | { | 68 | { |
69 | return 0x00000001; | 69 | return 0x00000001U; |
70 | } | 70 | } |
71 | static inline u32 perf_pmasys_control_membuf_status_overflowed_f(void) | 71 | static inline u32 perf_pmasys_control_membuf_status_overflowed_f(void) |
72 | { | 72 | { |
73 | return 0x10; | 73 | return 0x10U; |
74 | } | 74 | } |
75 | static inline u32 perf_pmasys_control_membuf_clear_status_f(u32 v) | 75 | static inline u32 perf_pmasys_control_membuf_clear_status_f(u32 v) |
76 | { | 76 | { |
77 | return (v & 0x1) << 5; | 77 | return (v & 0x1U) << 5U; |
78 | } | 78 | } |
79 | static inline u32 perf_pmasys_control_membuf_clear_status_v(u32 r) | 79 | static inline u32 perf_pmasys_control_membuf_clear_status_v(u32 r) |
80 | { | 80 | { |
81 | return (r >> 5) & 0x1; | 81 | return (r >> 5U) & 0x1U; |
82 | } | 82 | } |
83 | static inline u32 perf_pmasys_control_membuf_clear_status_doit_v(void) | 83 | static inline u32 perf_pmasys_control_membuf_clear_status_doit_v(void) |
84 | { | 84 | { |
85 | return 0x00000001; | 85 | return 0x00000001U; |
86 | } | 86 | } |
87 | static inline u32 perf_pmasys_control_membuf_clear_status_doit_f(void) | 87 | static inline u32 perf_pmasys_control_membuf_clear_status_doit_f(void) |
88 | { | 88 | { |
89 | return 0x20; | 89 | return 0x20U; |
90 | } | 90 | } |
91 | static inline u32 perf_pmasys_mem_block_r(void) | 91 | static inline u32 perf_pmasys_mem_block_r(void) |
92 | { | 92 | { |
93 | return 0x001b4070; | 93 | return 0x001b4070U; |
94 | } | 94 | } |
95 | static inline u32 perf_pmasys_mem_block_base_f(u32 v) | 95 | static inline u32 perf_pmasys_mem_block_base_f(u32 v) |
96 | { | 96 | { |
97 | return (v & 0xfffffff) << 0; | 97 | return (v & 0xfffffffU) << 0U; |
98 | } | 98 | } |
99 | static inline u32 perf_pmasys_mem_block_target_f(u32 v) | 99 | static inline u32 perf_pmasys_mem_block_target_f(u32 v) |
100 | { | 100 | { |
101 | return (v & 0x3) << 28; | 101 | return (v & 0x3U) << 28U; |
102 | } | 102 | } |
103 | static inline u32 perf_pmasys_mem_block_target_v(u32 r) | 103 | static inline u32 perf_pmasys_mem_block_target_v(u32 r) |
104 | { | 104 | { |
105 | return (r >> 28) & 0x3; | 105 | return (r >> 28U) & 0x3U; |
106 | } | 106 | } |
107 | static inline u32 perf_pmasys_mem_block_target_lfb_v(void) | 107 | static inline u32 perf_pmasys_mem_block_target_lfb_v(void) |
108 | { | 108 | { |
109 | return 0x00000000; | 109 | return 0x00000000U; |
110 | } | 110 | } |
111 | static inline u32 perf_pmasys_mem_block_target_lfb_f(void) | 111 | static inline u32 perf_pmasys_mem_block_target_lfb_f(void) |
112 | { | 112 | { |
113 | return 0x0; | 113 | return 0x0U; |
114 | } | 114 | } |
115 | static inline u32 perf_pmasys_mem_block_target_sys_coh_v(void) | 115 | static inline u32 perf_pmasys_mem_block_target_sys_coh_v(void) |
116 | { | 116 | { |
117 | return 0x00000002; | 117 | return 0x00000002U; |
118 | } | 118 | } |
119 | static inline u32 perf_pmasys_mem_block_target_sys_coh_f(void) | 119 | static inline u32 perf_pmasys_mem_block_target_sys_coh_f(void) |
120 | { | 120 | { |
121 | return 0x20000000; | 121 | return 0x20000000U; |
122 | } | 122 | } |
123 | static inline u32 perf_pmasys_mem_block_target_sys_ncoh_v(void) | 123 | static inline u32 perf_pmasys_mem_block_target_sys_ncoh_v(void) |
124 | { | 124 | { |
125 | return 0x00000003; | 125 | return 0x00000003U; |
126 | } | 126 | } |
127 | static inline u32 perf_pmasys_mem_block_target_sys_ncoh_f(void) | 127 | static inline u32 perf_pmasys_mem_block_target_sys_ncoh_f(void) |
128 | { | 128 | { |
129 | return 0x30000000; | 129 | return 0x30000000U; |
130 | } | 130 | } |
131 | static inline u32 perf_pmasys_mem_block_valid_f(u32 v) | 131 | static inline u32 perf_pmasys_mem_block_valid_f(u32 v) |
132 | { | 132 | { |
133 | return (v & 0x1) << 31; | 133 | return (v & 0x1U) << 31U; |
134 | } | 134 | } |
135 | static inline u32 perf_pmasys_mem_block_valid_v(u32 r) | 135 | static inline u32 perf_pmasys_mem_block_valid_v(u32 r) |
136 | { | 136 | { |
137 | return (r >> 31) & 0x1; | 137 | return (r >> 31U) & 0x1U; |
138 | } | 138 | } |
139 | static inline u32 perf_pmasys_mem_block_valid_true_v(void) | 139 | static inline u32 perf_pmasys_mem_block_valid_true_v(void) |
140 | { | 140 | { |
141 | return 0x00000001; | 141 | return 0x00000001U; |
142 | } | 142 | } |
143 | static inline u32 perf_pmasys_mem_block_valid_true_f(void) | 143 | static inline u32 perf_pmasys_mem_block_valid_true_f(void) |
144 | { | 144 | { |
145 | return 0x80000000; | 145 | return 0x80000000U; |
146 | } | 146 | } |
147 | static inline u32 perf_pmasys_mem_block_valid_false_v(void) | 147 | static inline u32 perf_pmasys_mem_block_valid_false_v(void) |
148 | { | 148 | { |
149 | return 0x00000000; | 149 | return 0x00000000U; |
150 | } | 150 | } |
151 | static inline u32 perf_pmasys_mem_block_valid_false_f(void) | 151 | static inline u32 perf_pmasys_mem_block_valid_false_f(void) |
152 | { | 152 | { |
153 | return 0x0; | 153 | return 0x0U; |
154 | } | 154 | } |
155 | static inline u32 perf_pmasys_outbase_r(void) | 155 | static inline u32 perf_pmasys_outbase_r(void) |
156 | { | 156 | { |
157 | return 0x001b4074; | 157 | return 0x001b4074U; |
158 | } | 158 | } |
159 | static inline u32 perf_pmasys_outbase_ptr_f(u32 v) | 159 | static inline u32 perf_pmasys_outbase_ptr_f(u32 v) |
160 | { | 160 | { |
161 | return (v & 0x7ffffff) << 5; | 161 | return (v & 0x7ffffffU) << 5U; |
162 | } | 162 | } |
163 | static inline u32 perf_pmasys_outbaseupper_r(void) | 163 | static inline u32 perf_pmasys_outbaseupper_r(void) |
164 | { | 164 | { |
165 | return 0x001b4078; | 165 | return 0x001b4078U; |
166 | } | 166 | } |
167 | static inline u32 perf_pmasys_outbaseupper_ptr_f(u32 v) | 167 | static inline u32 perf_pmasys_outbaseupper_ptr_f(u32 v) |
168 | { | 168 | { |
169 | return (v & 0xff) << 0; | 169 | return (v & 0xffU) << 0U; |
170 | } | 170 | } |
171 | static inline u32 perf_pmasys_outsize_r(void) | 171 | static inline u32 perf_pmasys_outsize_r(void) |
172 | { | 172 | { |
173 | return 0x001b407c; | 173 | return 0x001b407cU; |
174 | } | 174 | } |
175 | static inline u32 perf_pmasys_outsize_numbytes_f(u32 v) | 175 | static inline u32 perf_pmasys_outsize_numbytes_f(u32 v) |
176 | { | 176 | { |
177 | return (v & 0x7ffffff) << 5; | 177 | return (v & 0x7ffffffU) << 5U; |
178 | } | 178 | } |
179 | static inline u32 perf_pmasys_mem_bytes_r(void) | 179 | static inline u32 perf_pmasys_mem_bytes_r(void) |
180 | { | 180 | { |
181 | return 0x001b4084; | 181 | return 0x001b4084U; |
182 | } | 182 | } |
183 | static inline u32 perf_pmasys_mem_bytes_numbytes_f(u32 v) | 183 | static inline u32 perf_pmasys_mem_bytes_numbytes_f(u32 v) |
184 | { | 184 | { |
185 | return (v & 0xfffffff) << 4; | 185 | return (v & 0xfffffffU) << 4U; |
186 | } | 186 | } |
187 | static inline u32 perf_pmasys_mem_bump_r(void) | 187 | static inline u32 perf_pmasys_mem_bump_r(void) |
188 | { | 188 | { |
189 | return 0x001b4088; | 189 | return 0x001b4088U; |
190 | } | 190 | } |
191 | static inline u32 perf_pmasys_mem_bump_numbytes_f(u32 v) | 191 | static inline u32 perf_pmasys_mem_bump_numbytes_f(u32 v) |
192 | { | 192 | { |
193 | return (v & 0xfffffff) << 4; | 193 | return (v & 0xfffffffU) << 4U; |
194 | } | 194 | } |
195 | static inline u32 perf_pmasys_enginestatus_r(void) | 195 | static inline u32 perf_pmasys_enginestatus_r(void) |
196 | { | 196 | { |
197 | return 0x001b40a4; | 197 | return 0x001b40a4U; |
198 | } | 198 | } |
199 | static inline u32 perf_pmasys_enginestatus_rbufempty_f(u32 v) | 199 | static inline u32 perf_pmasys_enginestatus_rbufempty_f(u32 v) |
200 | { | 200 | { |
201 | return (v & 0x1) << 4; | 201 | return (v & 0x1U) << 4U; |
202 | } | 202 | } |
203 | static inline u32 perf_pmasys_enginestatus_rbufempty_empty_v(void) | 203 | static inline u32 perf_pmasys_enginestatus_rbufempty_empty_v(void) |
204 | { | 204 | { |
205 | return 0x00000001; | 205 | return 0x00000001U; |
206 | } | 206 | } |
207 | static inline u32 perf_pmasys_enginestatus_rbufempty_empty_f(void) | 207 | static inline u32 perf_pmasys_enginestatus_rbufempty_empty_f(void) |
208 | { | 208 | { |
209 | return 0x10; | 209 | return 0x10U; |
210 | } | 210 | } |
211 | #endif | 211 | #endif |