diff options
Diffstat (limited to 'drivers/gpu/nvgpu/include/bios.h')
-rw-r--r-- | drivers/gpu/nvgpu/include/bios.h | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/bios.h b/drivers/gpu/nvgpu/include/bios.h index 3af5bcf4..83d972e3 100644 --- a/drivers/gpu/nvgpu/include/bios.h +++ b/drivers/gpu/nvgpu/include/bios.h | |||
@@ -408,4 +408,98 @@ struct vfield_entry { | |||
408 | u16 strap_desc; | 408 | u16 strap_desc; |
409 | } __packed; | 409 | } __packed; |
410 | 410 | ||
411 | #define PERF_CLK_DOMAINS_IDX_MAX (32) | ||
412 | #define PERF_CLK_DOMAINS_IDX_INVALID PERF_CLK_DOMAINS_IDX_MAX | ||
413 | |||
414 | #define VBIOS_PSTATE_TABLE_VERSION_5X 0x50 | ||
415 | #define VBIOS_PSTATE_HEADER_5X_SIZE_10 (10) | ||
416 | |||
417 | struct vbios_pstate_header_5x { | ||
418 | u8 version; | ||
419 | u8 header_size; | ||
420 | u8 base_entry_size; | ||
421 | u8 base_entry_count; | ||
422 | u8 clock_entry_size; | ||
423 | u8 clock_entry_count; | ||
424 | u8 flags0; | ||
425 | u8 initial_pstate; | ||
426 | u8 cpi_support_level; | ||
427 | u8 cpi_features; | ||
428 | } __packed; | ||
429 | |||
430 | #define VBIOS_PSTATE_CLOCK_ENTRY_5X_SIZE_6 6 | ||
431 | |||
432 | #define VBIOS_PSTATE_BASE_ENTRY_5X_SIZE_2 0x2 | ||
433 | #define VBIOS_PSTATE_BASE_ENTRY_5X_SIZE_3 0x3 | ||
434 | |||
435 | struct vbios_pstate_entry_clock_5x { | ||
436 | u16 param0; | ||
437 | u32 param1; | ||
438 | } __packed; | ||
439 | |||
440 | struct vbios_pstate_entry_5x { | ||
441 | u8 pstate_level; | ||
442 | u8 flags0; | ||
443 | u8 lpwr_entry_idx; | ||
444 | struct vbios_pstate_entry_clock_5x clockEntry[PERF_CLK_DOMAINS_IDX_MAX]; | ||
445 | } __packed; | ||
446 | |||
447 | #define VBIOS_PSTATE_5X_CLOCK_PROG_PARAM0_NOM_FREQ_MHZ_SHIFT 0 | ||
448 | #define VBIOS_PSTATE_5X_CLOCK_PROG_PARAM0_NOM_FREQ_MHZ_MASK 0x00003FFF | ||
449 | |||
450 | #define VBIOS_PSTATE_5X_CLOCK_PROG_PARAM1_MIN_FREQ_MHZ_SHIFT 0 | ||
451 | #define VBIOS_PSTATE_5X_CLOCK_PROG_PARAM1_MIN_FREQ_MHZ_MASK 0x00003FFF | ||
452 | |||
453 | #define VBIOS_PSTATE_5X_CLOCK_PROG_PARAM1_MAX_FREQ_MHZ_SHIFT 14 | ||
454 | #define VBIOS_PSTATE_5X_CLOCK_PROG_PARAM1_MAX_FREQ_MHZ_MASK 0x0FFFC000 | ||
455 | |||
456 | #define VBIOS_PERFLEVEL_SKIP_ENTRY 0xFF | ||
457 | |||
458 | #define VBIOS_MEMORY_CLOCK_HEADER_11_VERSION 0x11 | ||
459 | |||
460 | #define VBIOS_MEMORY_CLOCK_HEADER_11_0_SIZE 16 | ||
461 | #define VBIOS_MEMORY_CLOCK_HEADER_11_1_SIZE 21 | ||
462 | #define VBIOS_MEMORY_CLOCK_HEADER_11_2_SIZE 26 | ||
463 | |||
464 | struct vbios_memory_clock_header_1x { | ||
465 | u8 version; | ||
466 | u8 header_size; | ||
467 | u8 base_entry_size; | ||
468 | u8 strap_entry_size; | ||
469 | u8 strap_entry_count; | ||
470 | u8 entry_count; | ||
471 | u8 flags; | ||
472 | u8 fbvdd_settle_time; | ||
473 | u32 cfg_pwrd_val; | ||
474 | u16 fbvddq_high; | ||
475 | u16 fbvddq_low; | ||
476 | u32 script_list_ptr; | ||
477 | u8 script_list_count; | ||
478 | u32 cmd_script_list_ptr; | ||
479 | u8 cmd_script_list_count; | ||
480 | } __packed; | ||
481 | |||
482 | #define VBIOS_MEMORY_CLOCK_BASE_ENTRY_11_2_SIZE 20 | ||
483 | |||
484 | struct vbios_memory_clock_base_entry_11 { | ||
485 | u16 minimum; | ||
486 | u16 maximum; | ||
487 | u32 script_pointer; | ||
488 | u8 flags0; | ||
489 | u32 fbpa_config; | ||
490 | u32 fbpa_config1; | ||
491 | u8 flags1; | ||
492 | u8 ref_mpllssf_freq_delta; | ||
493 | u8 flags2; | ||
494 | } __packed; | ||
495 | |||
496 | /* Script Pointer Index */ | ||
497 | /* #define VBIOS_MEMORY_CLOCK_BASE_ENTRY_11_FLAGS1_SCRIPT_INDEX 3:2*/ | ||
498 | #define VBIOS_MEMORY_CLOCK_BASE_ENTRY_11_FLAGS1_SCRIPT_INDEX_MASK 0xc | ||
499 | #define VBIOS_MEMORY_CLOCK_BASE_ENTRY_11_FLAGS1_SCRIPT_INDEX_SHIFT 2 | ||
500 | /* #define VBIOS_MEMORY_CLOCK_BASE_ENTRY_12_FLAGS2_CMD_SCRIPT_INDEX 1:0*/ | ||
501 | #define VBIOS_MEMORY_CLOCK_BASE_ENTRY_12_FLAGS2_CMD_SCRIPT_INDEX_MASK 0x3 | ||
502 | #define VBIOS_MEMORY_CLOCK_BASE_ENTRY_12_FLAGS2_CMD_SCRIPT_INDEX_SHIFT 0 | ||
503 | |||
411 | #endif | 504 | #endif |
505 | |||