diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/mm_gv11b.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/subctx_gv11b.c | 30 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/subctx_gv11b.h | 5 |
4 files changed, 19 insertions, 22 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 41d14a82..8e9e1818 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | |||
@@ -188,6 +188,9 @@ int channel_gv11b_setup_ramfc(struct channel_gk20a *c, | |||
188 | nvgpu_mem_wr32(g, mem, ram_fc_set_channel_info_w(), | 188 | nvgpu_mem_wr32(g, mem, ram_fc_set_channel_info_w(), |
189 | pbdma_set_channel_info_veid_f(c->subctx_id)); | 189 | pbdma_set_channel_info_veid_f(c->subctx_id)); |
190 | 190 | ||
191 | nvgpu_mem_wr32(g, mem, ram_in_engine_wfi_veid_w(), | ||
192 | ram_in_engine_wfi_veid_f(c->subctx_id)); | ||
193 | |||
191 | gv11b_fifo_init_ramfc_eng_method_buffer(g, c, mem); | 194 | gv11b_fifo_init_ramfc_eng_method_buffer(g, c, mem); |
192 | 195 | ||
193 | if (c->is_privileged_channel) { | 196 | if (c->is_privileged_channel) { |
diff --git a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c index 8d307d7c..ade1d9fe 100644 --- a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c | |||
@@ -35,6 +35,7 @@ | |||
35 | 35 | ||
36 | #include "mm_gv11b.h" | 36 | #include "mm_gv11b.h" |
37 | #include "fb_gv11b.h" | 37 | #include "fb_gv11b.h" |
38 | #include "subctx_gv11b.h" | ||
38 | 39 | ||
39 | #include <nvgpu/hw/gv11b/hw_fb_gv11b.h> | 40 | #include <nvgpu/hw/gv11b/hw_fb_gv11b.h> |
40 | #include <nvgpu/hw/gv11b/hw_gmmu_gv11b.h> | 41 | #include <nvgpu/hw/gv11b/hw_gmmu_gv11b.h> |
@@ -59,6 +60,8 @@ void gv11b_init_inst_block(struct nvgpu_mem *inst_block, | |||
59 | 60 | ||
60 | if (big_page_size && g->ops.mm.set_big_page_size) | 61 | if (big_page_size && g->ops.mm.set_big_page_size) |
61 | g->ops.mm.set_big_page_size(g, inst_block, big_page_size); | 62 | g->ops.mm.set_big_page_size(g, inst_block, big_page_size); |
63 | |||
64 | gv11b_init_subcontext_pdb(vm, inst_block); | ||
62 | } | 65 | } |
63 | 66 | ||
64 | bool gv11b_mm_mmu_fault_pending(struct gk20a *g) | 67 | bool gv11b_mm_mmu_fault_pending(struct gk20a *g) |
diff --git a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c index 4f98d82a..05d7dee0 100644 --- a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c | |||
@@ -33,12 +33,9 @@ | |||
33 | #include <nvgpu/hw/gv11b/hw_ram_gv11b.h> | 33 | #include <nvgpu/hw/gv11b/hw_ram_gv11b.h> |
34 | #include <nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h> | 34 | #include <nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h> |
35 | 35 | ||
36 | static void gv11b_init_subcontext_pdb(struct channel_gk20a *c, | 36 | static void gv11b_subctx_commit_valid_mask(struct vm_gk20a *vm, |
37 | struct nvgpu_mem *inst_block); | 37 | struct nvgpu_mem *inst_block); |
38 | 38 | static void gv11b_subctx_commit_pdb(struct vm_gk20a *vm, | |
39 | static void gv11b_subctx_commit_valid_mask(struct channel_gk20a *c, | ||
40 | struct nvgpu_mem *inst_block); | ||
41 | static void gv11b_subctx_commit_pdb(struct channel_gk20a *c, | ||
42 | struct nvgpu_mem *inst_block); | 39 | struct nvgpu_mem *inst_block); |
43 | 40 | ||
44 | void gv11b_free_subctx_header(struct channel_gk20a *c) | 41 | void gv11b_free_subctx_header(struct channel_gk20a *c) |
@@ -89,23 +86,15 @@ int gv11b_alloc_subctx_header(struct channel_gk20a *c) | |||
89 | 86 | ||
90 | nvgpu_memset(g, &ctx->mem, 0, 0, ctx->mem.size); | 87 | nvgpu_memset(g, &ctx->mem, 0, 0, ctx->mem.size); |
91 | nvgpu_mem_end(g, &ctx->mem); | 88 | nvgpu_mem_end(g, &ctx->mem); |
92 | |||
93 | gv11b_init_subcontext_pdb(c, &c->inst_block); | ||
94 | } | 89 | } |
95 | return ret; | 90 | return ret; |
96 | } | 91 | } |
97 | 92 | ||
98 | static void gv11b_init_subcontext_pdb(struct channel_gk20a *c, | 93 | void gv11b_init_subcontext_pdb(struct vm_gk20a *vm, |
99 | struct nvgpu_mem *inst_block) | 94 | struct nvgpu_mem *inst_block) |
100 | { | 95 | { |
101 | struct gk20a *g = c->g; | 96 | gv11b_subctx_commit_pdb(vm, inst_block); |
102 | 97 | gv11b_subctx_commit_valid_mask(vm, inst_block); | |
103 | gv11b_subctx_commit_pdb(c, inst_block); | ||
104 | gv11b_subctx_commit_valid_mask(c, inst_block); | ||
105 | |||
106 | nvgpu_log(g, gpu_dbg_info, " subctx %d instblk set", c->subctx_id); | ||
107 | nvgpu_mem_wr32(g, inst_block, ram_in_engine_wfi_veid_w(), | ||
108 | ram_in_engine_wfi_veid_f(c->subctx_id)); | ||
109 | 98 | ||
110 | } | 99 | } |
111 | 100 | ||
@@ -167,22 +156,21 @@ int gv11b_update_subctx_header(struct channel_gk20a *c, u64 gpu_va) | |||
167 | return ret; | 156 | return ret; |
168 | } | 157 | } |
169 | 158 | ||
170 | void gv11b_subctx_commit_valid_mask(struct channel_gk20a *c, | 159 | void gv11b_subctx_commit_valid_mask(struct vm_gk20a *vm, |
171 | struct nvgpu_mem *inst_block) | 160 | struct nvgpu_mem *inst_block) |
172 | { | 161 | { |
173 | struct gk20a *g = c->g; | 162 | struct gk20a *g = gk20a_from_vm(vm); |
174 | 163 | ||
175 | /* Make all subctx pdbs valid */ | 164 | /* Make all subctx pdbs valid */ |
176 | nvgpu_mem_wr32(g, inst_block, 166, 0xffffffff); | 165 | nvgpu_mem_wr32(g, inst_block, 166, 0xffffffff); |
177 | nvgpu_mem_wr32(g, inst_block, 167, 0xffffffff); | 166 | nvgpu_mem_wr32(g, inst_block, 167, 0xffffffff); |
178 | } | 167 | } |
179 | 168 | ||
180 | void gv11b_subctx_commit_pdb(struct channel_gk20a *c, | 169 | void gv11b_subctx_commit_pdb(struct vm_gk20a *vm, |
181 | struct nvgpu_mem *inst_block) | 170 | struct nvgpu_mem *inst_block) |
182 | { | 171 | { |
183 | struct gk20a *g = c->g; | 172 | struct gk20a *g = gk20a_from_vm(vm); |
184 | struct fifo_gk20a *f = &g->fifo; | 173 | struct fifo_gk20a *f = &g->fifo; |
185 | struct vm_gk20a *vm = c->vm; | ||
186 | u32 lo, hi; | 174 | u32 lo, hi; |
187 | u32 subctx_id = 0; | 175 | u32 subctx_id = 0; |
188 | u32 format_word; | 176 | u32 format_word; |
diff --git a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.h b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.h index 10dc0ba5..3dcb58b3 100644 --- a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.h | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Volta GPU series Subcontext | 3 | * Volta GPU series Subcontext |
4 | * | 4 | * |
5 | * Copyright (c) 2016 - 2017, NVIDIA CORPORATION. All rights reserved. | 5 | * Copyright (c) 2016 - 2018, NVIDIA CORPORATION. All rights reserved. |
6 | * | 6 | * |
7 | * Permission is hereby granted, free of charge, to any person obtaining a | 7 | * Permission is hereby granted, free of charge, to any person obtaining a |
8 | * copy of this software and associated documentation files (the "Software"), | 8 | * copy of this software and associated documentation files (the "Software"), |
@@ -31,4 +31,7 @@ void gv11b_free_subctx_header(struct channel_gk20a *c); | |||
31 | 31 | ||
32 | int gv11b_update_subctx_header(struct channel_gk20a *c, u64 gpu_va); | 32 | int gv11b_update_subctx_header(struct channel_gk20a *c, u64 gpu_va); |
33 | 33 | ||
34 | void gv11b_init_subcontext_pdb(struct vm_gk20a *vm, | ||
35 | struct nvgpu_mem *inst_block); | ||
36 | |||
34 | #endif /* __SUBCONTEXT_GV11B_H__ */ | 37 | #endif /* __SUBCONTEXT_GV11B_H__ */ |