diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 4 |
3 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index f369e12e..baad5e47 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -4152,3 +4152,13 @@ void gr_gv11b_ecc_init_scrub_reg(struct gk20a *g) | |||
4152 | nvgpu_warn(g, "ECC SCRUB SM ICACHE Failed"); | 4152 | nvgpu_warn(g, "ECC SCRUB SM ICACHE Failed"); |
4153 | 4153 | ||
4154 | } | 4154 | } |
4155 | |||
4156 | u32 gr_gv11b_get_gpcs_swdx_dss_zbc_c_format_reg(struct gk20a *g) | ||
4157 | { | ||
4158 | return gr_gpcs_swdx_dss_zbc_c_01_to_04_format_r(); | ||
4159 | } | ||
4160 | |||
4161 | u32 gr_gv11b_get_gpcs_swdx_dss_zbc_z_format_reg(struct gk20a *g) | ||
4162 | { | ||
4163 | return gr_gpcs_swdx_dss_zbc_z_01_to_04_format_r(); | ||
4164 | } | ||
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h index 17e5e9e3..b69e69bd 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h | |||
@@ -102,6 +102,8 @@ int gr_gv11b_handle_gpc_gpcmmu_exception(struct gk20a *g, u32 gpc, | |||
102 | int gr_gv11b_handle_gpc_gpccs_exception(struct gk20a *g, u32 gpc, | 102 | int gr_gv11b_handle_gpc_gpccs_exception(struct gk20a *g, u32 gpc, |
103 | u32 gpc_exception); | 103 | u32 gpc_exception); |
104 | void gr_gv11b_enable_gpc_exceptions(struct gk20a *g); | 104 | void gr_gv11b_enable_gpc_exceptions(struct gk20a *g); |
105 | u32 gr_gv11b_get_gpcs_swdx_dss_zbc_c_format_reg(struct gk20a *g); | ||
106 | u32 gr_gv11b_get_gpcs_swdx_dss_zbc_z_format_reg(struct gk20a *g); | ||
105 | int gr_gv11b_handle_tex_exception(struct gk20a *g, u32 gpc, u32 tpc, | 107 | int gr_gv11b_handle_tex_exception(struct gk20a *g, u32 gpc, u32 tpc, |
106 | bool *post_event); | 108 | bool *post_event); |
107 | int gr_gv11b_zbc_s_query_table(struct gk20a *g, struct gr_gk20a *gr, | 109 | int gr_gv11b_zbc_s_query_table(struct gk20a *g, struct gr_gk20a *gr, |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 9156d9b8..f19832b9 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -281,6 +281,10 @@ static const struct gpu_ops gv11b_ops = { | |||
281 | .detect_sm_arch = gr_gv11b_detect_sm_arch, | 281 | .detect_sm_arch = gr_gv11b_detect_sm_arch, |
282 | .add_zbc_color = gr_gp10b_add_zbc_color, | 282 | .add_zbc_color = gr_gp10b_add_zbc_color, |
283 | .add_zbc_depth = gr_gp10b_add_zbc_depth, | 283 | .add_zbc_depth = gr_gp10b_add_zbc_depth, |
284 | .get_gpcs_swdx_dss_zbc_c_format_reg = | ||
285 | gr_gv11b_get_gpcs_swdx_dss_zbc_c_format_reg, | ||
286 | .get_gpcs_swdx_dss_zbc_z_format_reg = | ||
287 | gr_gv11b_get_gpcs_swdx_dss_zbc_z_format_reg, | ||
284 | .zbc_set_table = gk20a_gr_zbc_set_table, | 288 | .zbc_set_table = gk20a_gr_zbc_set_table, |
285 | .zbc_query_table = gr_gk20a_query_zbc, | 289 | .zbc_query_table = gr_gk20a_query_zbc, |
286 | .pmu_save_zbc = gk20a_pmu_save_zbc, | 290 | .pmu_save_zbc = gk20a_pmu_save_zbc, |