diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 12 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c | 8 |
3 files changed, 12 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 68ac8f51..9e43941d 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -280,7 +280,7 @@ static int gr_gv11b_handle_lrf_exception(struct gk20a *g, u32 gpc, u32 tpc, | |||
280 | lrf_corrected_err_count_delta += | 280 | lrf_corrected_err_count_delta += |
281 | (is_lrf_ecc_corrected_total_err_overflow << | 281 | (is_lrf_ecc_corrected_total_err_overflow << |
282 | gr_pri_gpc0_tpc0_sm_lrf_ecc_corrected_err_count_total_s()); | 282 | gr_pri_gpc0_tpc0_sm_lrf_ecc_corrected_err_count_total_s()); |
283 | g->ecc.gr.t18x.sm_lrf_single_err_count.counters[tpc] += | 283 | g->ecc.gr.sm_lrf_single_err_count.counters[tpc] += |
284 | lrf_corrected_err_count_delta; | 284 | lrf_corrected_err_count_delta; |
285 | gk20a_writel(g, | 285 | gk20a_writel(g, |
286 | gr_pri_gpc0_tpc0_sm_lrf_ecc_corrected_err_count_r() + offset, | 286 | gr_pri_gpc0_tpc0_sm_lrf_ecc_corrected_err_count_r() + offset, |
@@ -295,7 +295,7 @@ static int gr_gv11b_handle_lrf_exception(struct gk20a *g, u32 gpc, u32 tpc, | |||
295 | lrf_uncorrected_err_count_delta += | 295 | lrf_uncorrected_err_count_delta += |
296 | (is_lrf_ecc_uncorrected_total_err_overflow << | 296 | (is_lrf_ecc_uncorrected_total_err_overflow << |
297 | gr_pri_gpc0_tpc0_sm_lrf_ecc_uncorrected_err_count_total_s()); | 297 | gr_pri_gpc0_tpc0_sm_lrf_ecc_uncorrected_err_count_total_s()); |
298 | g->ecc.gr.t18x.sm_lrf_double_err_count.counters[tpc] += | 298 | g->ecc.gr.sm_lrf_double_err_count.counters[tpc] += |
299 | lrf_uncorrected_err_count_delta; | 299 | lrf_uncorrected_err_count_delta; |
300 | gk20a_writel(g, | 300 | gk20a_writel(g, |
301 | gr_pri_gpc0_tpc0_sm_lrf_ecc_uncorrected_err_count_r() + offset, | 301 | gr_pri_gpc0_tpc0_sm_lrf_ecc_uncorrected_err_count_r() + offset, |
@@ -1664,8 +1664,8 @@ void gr_gv11b_commit_global_attrib_cb(struct gk20a *g, | |||
1664 | struct gr_ctx_desc *gr_ctx = ch_ctx->gr_ctx; | 1664 | struct gr_ctx_desc *gr_ctx = ch_ctx->gr_ctx; |
1665 | int attrBufferSize; | 1665 | int attrBufferSize; |
1666 | 1666 | ||
1667 | if (gr_ctx->t18x.preempt_ctxsw_buffer.gpu_va) | 1667 | if (gr_ctx->preempt_ctxsw_buffer.gpu_va) |
1668 | attrBufferSize = gr_ctx->t18x.betacb_ctxsw_buffer.size; | 1668 | attrBufferSize = gr_ctx->betacb_ctxsw_buffer.size; |
1669 | else | 1669 | else |
1670 | attrBufferSize = g->ops.gr.calc_global_ctx_buffer_size(g); | 1670 | attrBufferSize = g->ops.gr.calc_global_ctx_buffer_size(g); |
1671 | 1671 | ||
@@ -2385,10 +2385,10 @@ int gr_gv11b_init_fs_state(struct gk20a *g) | |||
2385 | gr_gpcs_tpcs_sm_disp_ctrl_re_suppress_disable_f()); | 2385 | gr_gpcs_tpcs_sm_disp_ctrl_re_suppress_disable_f()); |
2386 | gk20a_writel(g, gr_gpcs_tpcs_sm_disp_ctrl_r(), data); | 2386 | gk20a_writel(g, gr_gpcs_tpcs_sm_disp_ctrl_r(), data); |
2387 | 2387 | ||
2388 | if (g->gr.t18x.fecs_feature_override_ecc_val != 0) { | 2388 | if (g->gr.fecs_feature_override_ecc_val != 0) { |
2389 | gk20a_writel(g, | 2389 | gk20a_writel(g, |
2390 | gr_fecs_feature_override_ecc_r(), | 2390 | gr_fecs_feature_override_ecc_r(), |
2391 | g->gr.t18x.fecs_feature_override_ecc_val); | 2391 | g->gr.fecs_feature_override_ecc_val); |
2392 | } | 2392 | } |
2393 | 2393 | ||
2394 | return gr_gm20b_init_fs_state(g); | 2394 | return gr_gm20b_init_fs_state(g); |
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h index b6ba231e..1941f239 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h | |||
@@ -46,6 +46,8 @@ struct zbc_query_params; | |||
46 | struct channel_ctx_gk20a; | 46 | struct channel_ctx_gk20a; |
47 | struct nvgpu_warpstate; | 47 | struct nvgpu_warpstate; |
48 | struct nvgpu_gr_sm_error_state; | 48 | struct nvgpu_gr_sm_error_state; |
49 | struct gr_gk20a_isr_data; | ||
50 | struct gk20a_debug_output; | ||
49 | 51 | ||
50 | enum { | 52 | enum { |
51 | VOLTA_CHANNEL_GPFIFO_A = 0xC36F, | 53 | VOLTA_CHANNEL_GPFIFO_A = 0xC36F, |
diff --git a/drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c b/drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c index 95d82254..723e2e80 100644 --- a/drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c +++ b/drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c | |||
@@ -81,13 +81,13 @@ static int gv11b_tegra_probe(struct device *dev) | |||
81 | platform->bypass_smmu = !device_is_iommuable(dev); | 81 | platform->bypass_smmu = !device_is_iommuable(dev); |
82 | platform->disable_bigpage = platform->bypass_smmu; | 82 | platform->disable_bigpage = platform->bypass_smmu; |
83 | 83 | ||
84 | platform->g->gr.t18x.ctx_vars.dump_ctxsw_stats_on_channel_close | 84 | platform->g->gr.ctx_vars.dump_ctxsw_stats_on_channel_close |
85 | = false; | 85 | = false; |
86 | platform->g->gr.t18x.ctx_vars.dump_ctxsw_stats_on_channel_close | 86 | platform->g->gr.ctx_vars.dump_ctxsw_stats_on_channel_close |
87 | = false; | 87 | = false; |
88 | 88 | ||
89 | platform->g->gr.t18x.ctx_vars.force_preemption_gfxp = false; | 89 | platform->g->gr.ctx_vars.force_preemption_gfxp = false; |
90 | platform->g->gr.t18x.ctx_vars.force_preemption_cilp = false; | 90 | platform->g->gr.ctx_vars.force_preemption_cilp = false; |
91 | 91 | ||
92 | gp10b_tegra_get_clocks(dev); | 92 | gp10b_tegra_get_clocks(dev); |
93 | nvgpu_linux_init_clk_support(platform->g); | 93 | nvgpu_linux_init_clk_support(platform->g); |