diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 40 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 2 |
2 files changed, 41 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 7f6d1906..c43c6e83 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <nvgpu/enabled.h> | 30 | #include <nvgpu/enabled.h> |
31 | #include <nvgpu/fuse.h> | 31 | #include <nvgpu/fuse.h> |
32 | #include <nvgpu/bug.h> | 32 | #include <nvgpu/bug.h> |
33 | #include <nvgpu/error_notifier.h> | ||
33 | 34 | ||
34 | #include "gk20a/gk20a.h" | 35 | #include "gk20a/gk20a.h" |
35 | #include "gk20a/gr_gk20a.h" | 36 | #include "gk20a/gr_gk20a.h" |
@@ -2090,6 +2091,41 @@ static int gr_gv11b_handle_warp_esr_error_mmu_nack(struct gk20a *g, | |||
2090 | return 0; | 2091 | return 0; |
2091 | } | 2092 | } |
2092 | 2093 | ||
2094 | static int gr_gv11b_handle_warp_esr_error_misaligned_addr(struct gk20a *g, | ||
2095 | u32 gpc, u32 tpc, u32 sm, | ||
2096 | u32 warp_esr, | ||
2097 | struct channel_gk20a *fault_ch) | ||
2098 | { | ||
2099 | struct tsg_gk20a *tsg; | ||
2100 | u32 offset; | ||
2101 | struct channel_gk20a *ch_tsg; | ||
2102 | |||
2103 | if (fault_ch) { | ||
2104 | tsg = &g->fifo.tsg[fault_ch->tsgid]; | ||
2105 | |||
2106 | nvgpu_rwsem_down_read(&tsg->ch_list_lock); | ||
2107 | nvgpu_list_for_each_entry(ch_tsg, &tsg->ch_list, | ||
2108 | channel_gk20a, ch_entry) { | ||
2109 | if (gk20a_channel_get(ch_tsg)) { | ||
2110 | g->ops.fifo.set_error_notifier(ch_tsg, | ||
2111 | NVGPU_ERR_NOTIFIER_GR_EXCEPTION); | ||
2112 | gk20a_channel_put(ch_tsg); | ||
2113 | } | ||
2114 | } | ||
2115 | nvgpu_rwsem_up_read(&tsg->ch_list_lock); | ||
2116 | } | ||
2117 | |||
2118 | /* clear interrupt */ | ||
2119 | offset = gk20a_gr_gpc_offset(g, gpc) + | ||
2120 | gk20a_gr_tpc_offset(g, tpc) + | ||
2121 | gv11b_gr_sm_offset(g, sm); | ||
2122 | nvgpu_writel(g, | ||
2123 | gr_gpc0_tpc0_sm0_hww_warp_esr_r() + offset, 0); | ||
2124 | |||
2125 | /* return error so that recovery is triggered by gk20a_gr_isr() */ | ||
2126 | return -EFAULT; | ||
2127 | } | ||
2128 | |||
2093 | /* @brief pre-process work on the SM exceptions to determine if we clear them or not. | 2129 | /* @brief pre-process work on the SM exceptions to determine if we clear them or not. |
2094 | * | 2130 | * |
2095 | * On Pascal, if we are in CILP preemtion mode, preempt the channel and handle errors with special processing | 2131 | * On Pascal, if we are in CILP preemtion mode, preempt the channel and handle errors with special processing |
@@ -2118,6 +2154,10 @@ int gr_gv11b_pre_process_sm_exception(struct gk20a *g, | |||
2118 | return gr_gv11b_handle_warp_esr_error_mmu_nack(g, gpc, tpc, sm, | 2154 | return gr_gv11b_handle_warp_esr_error_mmu_nack(g, gpc, tpc, sm, |
2119 | warp_esr, fault_ch); | 2155 | warp_esr, fault_ch); |
2120 | 2156 | ||
2157 | if (warp_esr & gr_gpc0_tpc0_sm0_hww_warp_esr_error_misaligned_addr_f()) | ||
2158 | return gr_gv11b_handle_warp_esr_error_misaligned_addr(g, gpc, tpc, sm, | ||
2159 | warp_esr, fault_ch); | ||
2160 | |||
2121 | if (fault_ch) { | 2161 | if (fault_ch) { |
2122 | tsg = tsg_gk20a_from_ch(fault_ch); | 2162 | tsg = tsg_gk20a_from_ch(fault_ch); |
2123 | if (!tsg) | 2163 | if (!tsg) |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 2d6dc9b0..dd4bd55a 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -534,7 +534,7 @@ static const struct gpu_ops gv11b_ops = { | |||
534 | .check_ch_ctxsw_timeout = gk20a_fifo_check_ch_ctxsw_timeout, | 534 | .check_ch_ctxsw_timeout = gk20a_fifo_check_ch_ctxsw_timeout, |
535 | .channel_suspend = gk20a_channel_suspend, | 535 | .channel_suspend = gk20a_channel_suspend, |
536 | .channel_resume = gk20a_channel_resume, | 536 | .channel_resume = gk20a_channel_resume, |
537 | .set_error_notifier = nvgpu_set_error_notifier, | 537 | .set_error_notifier = nvgpu_set_error_notifier_if_empty, |
538 | .setup_sw = gk20a_init_fifo_setup_sw, | 538 | .setup_sw = gk20a_init_fifo_setup_sw, |
539 | #ifdef CONFIG_TEGRA_GK20A_NVHOST | 539 | #ifdef CONFIG_TEGRA_GK20A_NVHOST |
540 | .alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf, | 540 | .alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf, |