diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 15 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 2 |
3 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 80bb64a0..1d5e593c 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | |||
@@ -785,6 +785,21 @@ static int __locked_fifo_preempt_runlists(struct gk20a *g, u32 runlists_mask) | |||
785 | return ret; | 785 | return ret; |
786 | } | 786 | } |
787 | 787 | ||
788 | /* TSG enable sequence applicable for Volta and onwards */ | ||
789 | int gv11b_fifo_enable_tsg(struct tsg_gk20a *tsg) | ||
790 | { | ||
791 | struct gk20a *g = tsg->g; | ||
792 | struct channel_gk20a *ch; | ||
793 | |||
794 | down_read(&tsg->ch_list_lock); | ||
795 | nvgpu_list_for_each_entry(ch, &tsg->ch_list, channel_gk20a, ch_entry) { | ||
796 | g->ops.fifo.enable_channel(ch); | ||
797 | } | ||
798 | up_read(&tsg->ch_list_lock); | ||
799 | |||
800 | return 0; | ||
801 | } | ||
802 | |||
788 | int gv11b_fifo_preempt_tsg(struct gk20a *g, u32 tsgid) | 803 | int gv11b_fifo_preempt_tsg(struct gk20a *g, u32 tsgid) |
789 | { | 804 | { |
790 | struct fifo_gk20a *f = &g->fifo; | 805 | struct fifo_gk20a *f = &g->fifo; |
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h index 3fb2f6e9..e576714c 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | |||
@@ -69,6 +69,7 @@ int gv11b_fifo_is_preempt_pending(struct gk20a *g, u32 id, | |||
69 | unsigned int id_type, unsigned int timeout_rc_type); | 69 | unsigned int id_type, unsigned int timeout_rc_type); |
70 | int gv11b_fifo_preempt_channel(struct gk20a *g, u32 chid); | 70 | int gv11b_fifo_preempt_channel(struct gk20a *g, u32 chid); |
71 | int gv11b_fifo_preempt_tsg(struct gk20a *g, u32 tsgid); | 71 | int gv11b_fifo_preempt_tsg(struct gk20a *g, u32 tsgid); |
72 | int gv11b_fifo_enable_tsg(struct tsg_gk20a *tsg); | ||
72 | int gv11b_fifo_preempt_ch_tsg(struct gk20a *g, u32 id, | 73 | int gv11b_fifo_preempt_ch_tsg(struct gk20a *g, u32 id, |
73 | unsigned int id_type, unsigned int timeout_rc_type); | 74 | unsigned int id_type, unsigned int timeout_rc_type); |
74 | void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask, | 75 | void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask, |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index e9053081..947ac503 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -430,6 +430,8 @@ static const struct gpu_ops gv11b_ops = { | |||
430 | .pbdma_acquire_val = gk20a_fifo_pbdma_acquire_val, | 430 | .pbdma_acquire_val = gk20a_fifo_pbdma_acquire_val, |
431 | .preempt_channel = gv11b_fifo_preempt_channel, | 431 | .preempt_channel = gv11b_fifo_preempt_channel, |
432 | .preempt_tsg = gv11b_fifo_preempt_tsg, | 432 | .preempt_tsg = gv11b_fifo_preempt_tsg, |
433 | .enable_tsg = gv11b_fifo_enable_tsg, | ||
434 | .disable_tsg = gk20a_disable_tsg, | ||
433 | .update_runlist = gk20a_fifo_update_runlist, | 435 | .update_runlist = gk20a_fifo_update_runlist, |
434 | .trigger_mmu_fault = NULL, | 436 | .trigger_mmu_fault = NULL, |
435 | .get_mmu_fault_info = NULL, | 437 | .get_mmu_fault_info = NULL, |