diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 41892746..59865a0f 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -1658,8 +1658,8 @@ static int gr_gv11b_pre_process_sm_exception(struct gk20a *g, | |||
1658 | gk20a_writel(g, gr_gpc0_tpc0_sm0_hww_global_esr_r() + offset, | 1658 | gk20a_writel(g, gr_gpc0_tpc0_sm0_hww_global_esr_r() + offset, |
1659 | gr_gpc0_tpc0_sm0_hww_global_esr_single_step_complete_pending_f()); | 1659 | gr_gpc0_tpc0_sm0_hww_global_esr_single_step_complete_pending_f()); |
1660 | 1660 | ||
1661 | global_mask = gr_gpcs_tpcs_sm0_hww_global_esr_multiple_warp_errors_pending_f() | | 1661 | global_mask = gr_gpc0_tpc0_sm0_hww_global_esr_multiple_warp_errors_pending_f() | |
1662 | gr_gpcs_tpcs_sm0_hww_global_esr_bpt_pause_pending_f(); | 1662 | gr_gpc0_tpc0_sm0_hww_global_esr_bpt_pause_pending_f(); |
1663 | 1663 | ||
1664 | if (warp_esr != 0 || (global_esr & global_mask) != 0) { | 1664 | if (warp_esr != 0 || (global_esr & global_mask) != 0) { |
1665 | *ignore_debugger = true; | 1665 | *ignore_debugger = true; |
@@ -1697,13 +1697,13 @@ static int gr_gv11b_pre_process_sm_exception(struct gk20a *g, | |||
1697 | } | 1697 | } |
1698 | 1698 | ||
1699 | dbgr_control0 = gk20a_readl(g, gr_gpc0_tpc0_sm0_dbgr_control0_r() + offset); | 1699 | dbgr_control0 = gk20a_readl(g, gr_gpc0_tpc0_sm0_dbgr_control0_r() + offset); |
1700 | if (dbgr_control0 & gr_gpcs_tpcs_sm0_dbgr_control0_single_step_mode_enable_f()) { | 1700 | if (dbgr_control0 & gr_gpc0_tpc0_sm0_dbgr_control0_single_step_mode_enable_f()) { |
1701 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, | 1701 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, |
1702 | "CILP: clearing SINGLE_STEP_MODE before resume for gpc %d tpc %d\n", | 1702 | "CILP: clearing SINGLE_STEP_MODE before resume for gpc %d tpc %d\n", |
1703 | gpc, tpc); | 1703 | gpc, tpc); |
1704 | dbgr_control0 = set_field(dbgr_control0, | 1704 | dbgr_control0 = set_field(dbgr_control0, |
1705 | gr_gpcs_tpcs_sm0_dbgr_control0_single_step_mode_m(), | 1705 | gr_gpc0_tpc0_sm0_dbgr_control0_single_step_mode_m(), |
1706 | gr_gpcs_tpcs_sm0_dbgr_control0_single_step_mode_disable_f()); | 1706 | gr_gpc0_tpc0_sm0_dbgr_control0_single_step_mode_disable_f()); |
1707 | gk20a_writel(g, gr_gpc0_tpc0_sm0_dbgr_control0_r() + offset, dbgr_control0); | 1707 | gk20a_writel(g, gr_gpc0_tpc0_sm0_dbgr_control0_r() + offset, dbgr_control0); |
1708 | } | 1708 | } |
1709 | 1709 | ||