summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gv11b/tpc_gv11b.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/tpc_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/tpc_gv11b.c70
1 files changed, 70 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/tpc_gv11b.c b/drivers/gpu/nvgpu/gv11b/tpc_gv11b.c
new file mode 100644
index 00000000..3177870c
--- /dev/null
+++ b/drivers/gpu/nvgpu/gv11b/tpc_gv11b.c
@@ -0,0 +1,70 @@
1/*
2 * GV11B TPC
3 *
4 * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24#include <nvgpu/gk20a.h>
25#include "tpc_gv11b.h"
26
27int gv11b_tpc_powergate(struct gk20a *g, u32 fuse_status)
28{
29 int err = 0;
30
31 if (fuse_status == 0x0) {
32 g->can_tpc_powergate = true;
33
34 } else {
35 /* if hardware has already floorswept any TPC
36 * (fuse_status != 0x0) and if TPC PG mask
37 * sent from userspace is 0x0 GPU will be powered on
38 * with the default fuse_status setting. It cannot
39 * un-floorsweep any TPC
40 * thus, set g->tpc_pg_mask to fuse_status value
41 */
42 if (g->tpc_pg_mask == 0x0) {
43 g->can_tpc_powergate = true;
44 g->tpc_pg_mask = fuse_status;
45
46 } else if (fuse_status == g->tpc_pg_mask) {
47 g->can_tpc_powergate = true;
48
49 } else if ((fuse_status & g->tpc_pg_mask) ==
50 fuse_status) {
51 g->can_tpc_powergate = true;
52
53 } else {
54 /* If userspace sends a TPC PG mask such that
55 * it tries to un-floorsweep any TPC which is
56 * already powergated from hardware, then
57 * such mask is invalid.
58 * In this case set tpc pg mask to 0x0
59 * Return -EINVAL here and halt GPU poweron.
60 */
61 nvgpu_err(g, "Invalid TPC_PG mask: 0x%x",
62 g->tpc_pg_mask);
63 g->can_tpc_powergate = false;
64 g->tpc_pg_mask = 0x0;
65 err = -EINVAL;
66 }
67 }
68
69 return err;
70}