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Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c549
1 files changed, 549 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c b/drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c
new file mode 100644
index 00000000..95d82254
--- /dev/null
+++ b/drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c
@@ -0,0 +1,549 @@
1/*
2 * GV11B Tegra Platform Interface
3 *
4 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#include <linux/of_platform.h>
26#include <linux/debugfs.h>
27#include <linux/dma-buf.h>
28#include <linux/nvmap.h>
29#include <linux/reset.h>
30#include <linux/hashtable.h>
31#include <linux/clk.h>
32#include <nvgpu/nvhost.h>
33#include <nvgpu/nvhost_t19x.h>
34
35#include <uapi/linux/nvgpu.h>
36
37#include <soc/tegra/tegra_bpmp.h>
38#include <soc/tegra/tegra_powergate.h>
39
40#include "gk20a/gk20a.h"
41#include "common/linux/platform_gk20a.h"
42#include "common/linux/clk.h"
43
44#include "gp10b/platform_gp10b.h"
45#include "common/linux/platform_gp10b_tegra.h"
46
47#include "common/linux/os_linux.h"
48#include "common/linux/platform_gk20a_tegra.h"
49#include "gr_gv11b.h"
50#include "nvgpu_gpuid_t19x.h"
51
52static void gr_gv11b_remove_sysfs(struct device *dev);
53
54static int gv11b_tegra_probe(struct device *dev)
55{
56 struct gk20a_platform *platform = dev_get_drvdata(dev);
57#ifdef CONFIG_TEGRA_GK20A_NVHOST
58 struct gk20a *g = platform->g;
59 int err = 0;
60
61 err = nvgpu_get_nvhost_dev(g);
62 if (err) {
63 dev_err(dev, "host1x device not available");
64 return err;
65 }
66
67 err = nvgpu_nvhost_syncpt_unit_interface_get_aperture(
68 g->nvhost_dev,
69 &g->syncpt_unit_base,
70 &g->syncpt_unit_size);
71 if (err) {
72 dev_err(dev, "Failed to get syncpt interface");
73 return -ENOSYS;
74 }
75 g->syncpt_size = nvgpu_nvhost_syncpt_unit_interface_get_byte_offset(1);
76 gk20a_dbg_info("syncpt_unit_base %llx syncpt_unit_size %zx size %x\n",
77 g->syncpt_unit_base, g->syncpt_unit_size,
78 g->syncpt_size);
79#endif
80
81 platform->bypass_smmu = !device_is_iommuable(dev);
82 platform->disable_bigpage = platform->bypass_smmu;
83
84 platform->g->gr.t18x.ctx_vars.dump_ctxsw_stats_on_channel_close
85 = false;
86 platform->g->gr.t18x.ctx_vars.dump_ctxsw_stats_on_channel_close
87 = false;
88
89 platform->g->gr.t18x.ctx_vars.force_preemption_gfxp = false;
90 platform->g->gr.t18x.ctx_vars.force_preemption_cilp = false;
91
92 gp10b_tegra_get_clocks(dev);
93 nvgpu_linux_init_clk_support(platform->g);
94
95 return 0;
96}
97
98static int gv11b_tegra_remove(struct device *dev)
99{
100 gp10b_tegra_remove(dev);
101
102 gr_gv11b_remove_sysfs(dev);
103
104 return 0;
105}
106
107static bool gv11b_tegra_is_railgated(struct device *dev)
108{
109 bool ret = false;
110#ifdef TEGRA194_POWER_DOMAIN_GPU
111 struct gk20a *g = get_gk20a(dev);
112
113 if (tegra_bpmp_running()) {
114 nvgpu_log(g, gpu_dbg_info, "bpmp running");
115 ret = !tegra_powergate_is_powered(TEGRA194_POWER_DOMAIN_GPU);
116
117 nvgpu_log(g, gpu_dbg_info, "railgated? %s", ret ? "yes" : "no");
118 } else {
119 nvgpu_log(g, gpu_dbg_info, "bpmp not running");
120 }
121#endif
122 return ret;
123}
124
125static int gv11b_tegra_railgate(struct device *dev)
126{
127#ifdef TEGRA194_POWER_DOMAIN_GPU
128 struct gk20a_platform *platform = gk20a_get_platform(dev);
129 struct gk20a *g = get_gk20a(dev);
130 int i;
131
132 if (tegra_bpmp_running()) {
133 nvgpu_log(g, gpu_dbg_info, "bpmp running");
134 if (!tegra_powergate_is_powered(TEGRA194_POWER_DOMAIN_GPU)) {
135 nvgpu_log(g, gpu_dbg_info, "powergate is not powered");
136 return 0;
137 }
138 nvgpu_log(g, gpu_dbg_info, "clk_disable_unprepare");
139 for (i = 0; i < platform->num_clks; i++) {
140 if (platform->clk[i])
141 clk_disable_unprepare(platform->clk[i]);
142 }
143 nvgpu_log(g, gpu_dbg_info, "powergate_partition");
144 tegra_powergate_partition(TEGRA194_POWER_DOMAIN_GPU);
145 } else {
146 nvgpu_log(g, gpu_dbg_info, "bpmp not running");
147 }
148#endif
149 return 0;
150}
151
152static int gv11b_tegra_unrailgate(struct device *dev)
153{
154 int ret = 0;
155#ifdef TEGRA194_POWER_DOMAIN_GPU
156 struct gk20a_platform *platform = gk20a_get_platform(dev);
157 struct gk20a *g = get_gk20a(dev);
158 int i;
159
160 if (tegra_bpmp_running()) {
161 nvgpu_log(g, gpu_dbg_info, "bpmp running");
162 ret = tegra_unpowergate_partition(TEGRA194_POWER_DOMAIN_GPU);
163 if (ret) {
164 nvgpu_log(g, gpu_dbg_info,
165 "unpowergate partition failed");
166 return ret;
167 }
168 nvgpu_log(g, gpu_dbg_info, "clk_prepare_enable");
169 for (i = 0; i < platform->num_clks; i++) {
170 if (platform->clk[i])
171 clk_prepare_enable(platform->clk[i]);
172 }
173 } else {
174 nvgpu_log(g, gpu_dbg_info, "bpmp not running");
175 }
176#endif
177 return ret;
178}
179
180static int gv11b_tegra_suspend(struct device *dev)
181{
182 return 0;
183}
184
185struct gk20a_platform t19x_gpu_tegra_platform = {
186 .has_syncpoints = true,
187
188 /* power management configuration */
189
190 /* ptimer src frequency in hz*/
191 .ptimer_src_freq = 31250000,
192
193 .probe = gv11b_tegra_probe,
194 .remove = gv11b_tegra_remove,
195
196 .enable_slcg = false,
197 .enable_blcg = false,
198 .enable_elcg = false,
199 .can_slcg = false,
200 .can_blcg = false,
201 .can_elcg = false,
202
203 /* power management callbacks */
204 .suspend = gv11b_tegra_suspend,
205 .railgate = gv11b_tegra_railgate,
206 .unrailgate = gv11b_tegra_unrailgate,
207 .is_railgated = gv11b_tegra_is_railgated,
208
209 .busy = gk20a_tegra_busy,
210 .idle = gk20a_tegra_idle,
211
212 .dump_platform_dependencies = gk20a_tegra_debug_dump,
213
214 .soc_name = "tegra19x",
215
216 .honors_aperture = true,
217 .unified_memory = true,
218
219 .reset_assert = gp10b_tegra_reset_assert,
220 .reset_deassert = gp10b_tegra_reset_deassert,
221};
222
223static struct device_attribute *dev_attr_sm_l1_tag_ecc_corrected_err_count_array;
224static struct device_attribute *dev_attr_sm_l1_tag_ecc_uncorrected_err_count_array;
225static struct device_attribute *dev_attr_sm_cbu_ecc_corrected_err_count_array;
226static struct device_attribute *dev_attr_sm_cbu_ecc_uncorrected_err_count_array;
227static struct device_attribute *dev_attr_sm_l1_data_ecc_corrected_err_count_array;
228static struct device_attribute *dev_attr_sm_l1_data_ecc_uncorrected_err_count_array;
229static struct device_attribute *dev_attr_sm_icache_ecc_corrected_err_count_array;
230static struct device_attribute *dev_attr_sm_icache_ecc_uncorrected_err_count_array;
231static struct device_attribute *dev_attr_gcc_l15_ecc_corrected_err_count_array;
232static struct device_attribute *dev_attr_gcc_l15_ecc_uncorrected_err_count_array;
233static struct device_attribute *dev_attr_mmu_l1tlb_ecc_corrected_err_count_array;
234static struct device_attribute *dev_attr_mmu_l1tlb_ecc_uncorrected_err_count_array;
235
236static struct device_attribute *dev_attr_fecs_ecc_corrected_err_count_array;
237static struct device_attribute *dev_attr_fecs_ecc_uncorrected_err_count_array;
238static struct device_attribute *dev_attr_gpccs_ecc_corrected_err_count_array;
239static struct device_attribute *dev_attr_gpccs_ecc_uncorrected_err_count_array;
240
241static struct device_attribute *dev_attr_l2_cache_ecc_corrected_err_count_array;
242static struct device_attribute *dev_attr_l2_cache_ecc_uncorrected_err_count_array;
243
244static struct device_attribute *dev_attr_mmu_l2tlb_ecc_corrected_err_count_array;
245static struct device_attribute *dev_attr_mmu_l2tlb_ecc_uncorrected_err_count_array;
246static struct device_attribute *dev_attr_mmu_hubtlb_ecc_corrected_err_count_array;
247static struct device_attribute *dev_attr_mmu_hubtlb_ecc_uncorrected_err_count_array;
248static struct device_attribute *dev_attr_mmu_fillunit_ecc_corrected_err_count_array;
249static struct device_attribute *dev_attr_mmu_fillunit_ecc_uncorrected_err_count_array;
250
251void gr_gv11b_create_sysfs(struct gk20a *g)
252{
253 struct device *dev = dev_from_gk20a(g);
254 int error = 0;
255 /* This stat creation function is called on GR init. GR can get
256 initialized multiple times but we only need to create the ECC
257 stats once. Therefore, add the following check to avoid
258 creating duplicate stat sysfs nodes. */
259 if (g->ecc.gr.t19x.sm_l1_tag_corrected_err_count.counters != NULL)
260 return;
261
262 gr_gp10b_create_sysfs(g);
263
264 error |= gr_gp10b_ecc_stat_create(dev,
265 0,
266 "sm_l1_tag_ecc_corrected_err_count",
267 &g->ecc.gr.t19x.sm_l1_tag_corrected_err_count,
268 &dev_attr_sm_l1_tag_ecc_corrected_err_count_array);
269
270 error |= gr_gp10b_ecc_stat_create(dev,
271 0,
272 "sm_l1_tag_ecc_uncorrected_err_count",
273 &g->ecc.gr.t19x.sm_l1_tag_uncorrected_err_count,
274 &dev_attr_sm_l1_tag_ecc_uncorrected_err_count_array);
275
276 error |= gr_gp10b_ecc_stat_create(dev,
277 0,
278 "sm_cbu_ecc_corrected_err_count",
279 &g->ecc.gr.t19x.sm_cbu_corrected_err_count,
280 &dev_attr_sm_cbu_ecc_corrected_err_count_array);
281
282 error |= gr_gp10b_ecc_stat_create(dev,
283 0,
284 "sm_cbu_ecc_uncorrected_err_count",
285 &g->ecc.gr.t19x.sm_cbu_uncorrected_err_count,
286 &dev_attr_sm_cbu_ecc_uncorrected_err_count_array);
287
288 error |= gr_gp10b_ecc_stat_create(dev,
289 0,
290 "sm_l1_data_ecc_corrected_err_count",
291 &g->ecc.gr.t19x.sm_l1_data_corrected_err_count,
292 &dev_attr_sm_l1_data_ecc_corrected_err_count_array);
293
294 error |= gr_gp10b_ecc_stat_create(dev,
295 0,
296 "sm_l1_data_ecc_uncorrected_err_count",
297 &g->ecc.gr.t19x.sm_l1_data_uncorrected_err_count,
298 &dev_attr_sm_l1_data_ecc_uncorrected_err_count_array);
299
300 error |= gr_gp10b_ecc_stat_create(dev,
301 0,
302 "sm_icache_ecc_corrected_err_count",
303 &g->ecc.gr.t19x.sm_icache_corrected_err_count,
304 &dev_attr_sm_icache_ecc_corrected_err_count_array);
305
306 error |= gr_gp10b_ecc_stat_create(dev,
307 0,
308 "sm_icache_ecc_uncorrected_err_count",
309 &g->ecc.gr.t19x.sm_icache_uncorrected_err_count,
310 &dev_attr_sm_icache_ecc_uncorrected_err_count_array);
311
312 error |= gr_gp10b_ecc_stat_create(dev,
313 0,
314 "gcc_l15_ecc_corrected_err_count",
315 &g->ecc.gr.t19x.gcc_l15_corrected_err_count,
316 &dev_attr_gcc_l15_ecc_corrected_err_count_array);
317
318 error |= gr_gp10b_ecc_stat_create(dev,
319 0,
320 "gcc_l15_ecc_uncorrected_err_count",
321 &g->ecc.gr.t19x.gcc_l15_uncorrected_err_count,
322 &dev_attr_gcc_l15_ecc_uncorrected_err_count_array);
323
324 error |= gp10b_ecc_stat_create(dev,
325 g->ltc_count,
326 "ltc",
327 "l2_cache_uncorrected_err_count",
328 &g->ecc.ltc.t19x.l2_cache_uncorrected_err_count,
329 &dev_attr_l2_cache_ecc_uncorrected_err_count_array);
330
331 error |= gp10b_ecc_stat_create(dev,
332 g->ltc_count,
333 "ltc",
334 "l2_cache_corrected_err_count",
335 &g->ecc.ltc.t19x.l2_cache_corrected_err_count,
336 &dev_attr_l2_cache_ecc_corrected_err_count_array);
337
338 error |= gp10b_ecc_stat_create(dev,
339 1,
340 "gpc",
341 "fecs_ecc_uncorrected_err_count",
342 &g->ecc.gr.t19x.fecs_uncorrected_err_count,
343 &dev_attr_fecs_ecc_uncorrected_err_count_array);
344
345 error |= gp10b_ecc_stat_create(dev,
346 1,
347 "gpc",
348 "fecs_ecc_corrected_err_count",
349 &g->ecc.gr.t19x.fecs_corrected_err_count,
350 &dev_attr_fecs_ecc_corrected_err_count_array);
351
352 error |= gp10b_ecc_stat_create(dev,
353 g->gr.gpc_count,
354 "gpc",
355 "gpccs_ecc_uncorrected_err_count",
356 &g->ecc.gr.t19x.gpccs_uncorrected_err_count,
357 &dev_attr_gpccs_ecc_uncorrected_err_count_array);
358
359 error |= gp10b_ecc_stat_create(dev,
360 g->gr.gpc_count,
361 "gpc",
362 "gpccs_ecc_corrected_err_count",
363 &g->ecc.gr.t19x.gpccs_corrected_err_count,
364 &dev_attr_gpccs_ecc_corrected_err_count_array);
365
366 error |= gp10b_ecc_stat_create(dev,
367 g->gr.gpc_count,
368 "gpc",
369 "mmu_l1tlb_ecc_uncorrected_err_count",
370 &g->ecc.gr.t19x.mmu_l1tlb_uncorrected_err_count,
371 &dev_attr_mmu_l1tlb_ecc_uncorrected_err_count_array);
372
373 error |= gp10b_ecc_stat_create(dev,
374 g->gr.gpc_count,
375 "gpc",
376 "mmu_l1tlb_ecc_corrected_err_count",
377 &g->ecc.gr.t19x.mmu_l1tlb_corrected_err_count,
378 &dev_attr_mmu_l1tlb_ecc_corrected_err_count_array);
379
380 error |= gp10b_ecc_stat_create(dev,
381 1,
382 "eng",
383 "mmu_l2tlb_ecc_uncorrected_err_count",
384 &g->ecc.eng.t19x.mmu_l2tlb_uncorrected_err_count,
385 &dev_attr_mmu_l2tlb_ecc_uncorrected_err_count_array);
386
387 error |= gp10b_ecc_stat_create(dev,
388 1,
389 "eng",
390 "mmu_l2tlb_ecc_corrected_err_count",
391 &g->ecc.eng.t19x.mmu_l2tlb_corrected_err_count,
392 &dev_attr_mmu_l2tlb_ecc_corrected_err_count_array);
393
394 error |= gp10b_ecc_stat_create(dev,
395 1,
396 "eng",
397 "mmu_hubtlb_ecc_uncorrected_err_count",
398 &g->ecc.eng.t19x.mmu_hubtlb_uncorrected_err_count,
399 &dev_attr_mmu_hubtlb_ecc_uncorrected_err_count_array);
400
401 error |= gp10b_ecc_stat_create(dev,
402 1,
403 "eng",
404 "mmu_hubtlb_ecc_corrected_err_count",
405 &g->ecc.eng.t19x.mmu_hubtlb_corrected_err_count,
406 &dev_attr_mmu_hubtlb_ecc_corrected_err_count_array);
407
408 error |= gp10b_ecc_stat_create(dev,
409 1,
410 "eng",
411 "mmu_fillunit_ecc_uncorrected_err_count",
412 &g->ecc.eng.t19x.mmu_fillunit_uncorrected_err_count,
413 &dev_attr_mmu_fillunit_ecc_uncorrected_err_count_array);
414
415 error |= gp10b_ecc_stat_create(dev,
416 1,
417 "eng",
418 "mmu_fillunit_ecc_corrected_err_count",
419 &g->ecc.eng.t19x.mmu_fillunit_corrected_err_count,
420 &dev_attr_mmu_fillunit_ecc_corrected_err_count_array);
421
422 if (error)
423 dev_err(dev, "Failed to create gv11b sysfs attributes!\n");
424}
425
426static void gr_gv11b_remove_sysfs(struct device *dev)
427{
428 struct gk20a *g = get_gk20a(dev);
429
430 gr_gp10b_ecc_stat_remove(dev,
431 0,
432 &g->ecc.gr.t19x.sm_l1_tag_corrected_err_count,
433 dev_attr_sm_l1_tag_ecc_corrected_err_count_array);
434
435 gr_gp10b_ecc_stat_remove(dev,
436 0,
437 &g->ecc.gr.t19x.sm_l1_tag_uncorrected_err_count,
438 dev_attr_sm_l1_tag_ecc_uncorrected_err_count_array);
439
440 gr_gp10b_ecc_stat_remove(dev,
441 0,
442 &g->ecc.gr.t19x.sm_cbu_corrected_err_count,
443 dev_attr_sm_cbu_ecc_corrected_err_count_array);
444
445 gr_gp10b_ecc_stat_remove(dev,
446 0,
447 &g->ecc.gr.t19x.sm_cbu_uncorrected_err_count,
448 dev_attr_sm_cbu_ecc_uncorrected_err_count_array);
449
450 gr_gp10b_ecc_stat_remove(dev,
451 0,
452 &g->ecc.gr.t19x.sm_l1_data_corrected_err_count,
453 dev_attr_sm_l1_data_ecc_corrected_err_count_array);
454
455 gr_gp10b_ecc_stat_remove(dev,
456 0,
457 &g->ecc.gr.t19x.sm_l1_data_uncorrected_err_count,
458 dev_attr_sm_l1_data_ecc_uncorrected_err_count_array);
459
460 gr_gp10b_ecc_stat_remove(dev,
461 0,
462 &g->ecc.gr.t19x.sm_icache_corrected_err_count,
463 dev_attr_sm_icache_ecc_corrected_err_count_array);
464
465 gr_gp10b_ecc_stat_remove(dev,
466 0,
467 &g->ecc.gr.t19x.sm_icache_uncorrected_err_count,
468 dev_attr_sm_icache_ecc_uncorrected_err_count_array);
469
470 gr_gp10b_ecc_stat_remove(dev,
471 0,
472 &g->ecc.gr.t19x.gcc_l15_corrected_err_count,
473 dev_attr_gcc_l15_ecc_corrected_err_count_array);
474
475 gr_gp10b_ecc_stat_remove(dev,
476 0,
477 &g->ecc.gr.t19x.gcc_l15_uncorrected_err_count,
478 dev_attr_gcc_l15_ecc_uncorrected_err_count_array);
479
480 gp10b_ecc_stat_remove(dev,
481 g->ltc_count,
482 &g->ecc.ltc.t19x.l2_cache_uncorrected_err_count,
483 dev_attr_l2_cache_ecc_uncorrected_err_count_array);
484
485 gp10b_ecc_stat_remove(dev,
486 g->ltc_count,
487 &g->ecc.ltc.t19x.l2_cache_corrected_err_count,
488 dev_attr_l2_cache_ecc_corrected_err_count_array);
489
490 gp10b_ecc_stat_remove(dev,
491 1,
492 &g->ecc.gr.t19x.fecs_uncorrected_err_count,
493 dev_attr_fecs_ecc_uncorrected_err_count_array);
494
495 gp10b_ecc_stat_remove(dev,
496 1,
497 &g->ecc.gr.t19x.fecs_corrected_err_count,
498 dev_attr_fecs_ecc_corrected_err_count_array);
499
500 gp10b_ecc_stat_remove(dev,
501 g->gr.gpc_count,
502 &g->ecc.gr.t19x.gpccs_uncorrected_err_count,
503 dev_attr_gpccs_ecc_uncorrected_err_count_array);
504
505 gp10b_ecc_stat_remove(dev,
506 g->gr.gpc_count,
507 &g->ecc.gr.t19x.gpccs_corrected_err_count,
508 dev_attr_gpccs_ecc_corrected_err_count_array);
509
510 gp10b_ecc_stat_remove(dev,
511 g->gr.gpc_count,
512 &g->ecc.gr.t19x.mmu_l1tlb_uncorrected_err_count,
513 dev_attr_mmu_l1tlb_ecc_uncorrected_err_count_array);
514
515 gp10b_ecc_stat_remove(dev,
516 g->gr.gpc_count,
517 &g->ecc.gr.t19x.mmu_l1tlb_corrected_err_count,
518 dev_attr_mmu_l1tlb_ecc_corrected_err_count_array);
519
520 gp10b_ecc_stat_remove(dev,
521 1,
522 &g->ecc.eng.t19x.mmu_l2tlb_uncorrected_err_count,
523 dev_attr_mmu_l2tlb_ecc_uncorrected_err_count_array);
524
525 gp10b_ecc_stat_remove(dev,
526 1,
527 &g->ecc.eng.t19x.mmu_l2tlb_corrected_err_count,
528 dev_attr_mmu_l2tlb_ecc_corrected_err_count_array);
529
530 gp10b_ecc_stat_remove(dev,
531 1,
532 &g->ecc.eng.t19x.mmu_hubtlb_uncorrected_err_count,
533 dev_attr_mmu_hubtlb_ecc_uncorrected_err_count_array);
534
535 gp10b_ecc_stat_remove(dev,
536 1,
537 &g->ecc.eng.t19x.mmu_hubtlb_corrected_err_count,
538 dev_attr_mmu_hubtlb_ecc_corrected_err_count_array);
539
540 gp10b_ecc_stat_remove(dev,
541 1,
542 &g->ecc.eng.t19x.mmu_fillunit_uncorrected_err_count,
543 dev_attr_mmu_fillunit_ecc_uncorrected_err_count_array);
544
545 gp10b_ecc_stat_remove(dev,
546 1,
547 &g->ecc.eng.t19x.mmu_fillunit_corrected_err_count,
548 dev_attr_mmu_fillunit_ecc_corrected_err_count_array);
549}
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-16 00:12:09 -0400